SNVS276I April 2004 – February 2019 LM2743
PRODUCTION DATA.
The start up/soft-start of the LM2743 can be delayed for the purpose of sequencing by connecting a resistor divider from the output of a master power supply to the SD pin, as shown in Figure 22.
A desired delay time tDELAY between the startup of the master supply output voltage and the LM2743 output voltage can be set based on the SD pin low-to-high threshold VSD-IH and the slew rate of the voltage at the SD pin, SRSD:
Note again, that in Figure 22, the output voltage of the LM2743 has been represented symbolically as VOUT2,. without explicitly showing the power components.
VSD-IH is typically 1.08V and SRSD is the slew rate of the SD pin voltage. The values of the sequencing divider resistors RS1 and RS2 set the SRSD based on the master supply output voltage slew rate, SROUT1, using the following equation:
For example, if the master supply output voltage slew rate was 1V/ms and the desired delay time between the startup of the master supply and LM2743 output voltage was 5ms, then the desired SD pin slew rate would be (1.08V/5 ms) = 0.216 V/ms. Due to the internal impedance of the SD pin, the maximum recommended value for RS2 is 1 kΩ. To achieve the desired slew rate, RS1 would then be 274 Ω. A timing diagram for this example is shown in Figure 23.