SNVS069E February   2000  – January 2022 LM2767

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Parameter Measurement Information
    1. 7.1 Test Circuit
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Positive Voltage Doubler
        2. 9.2.2.2 Capacitor Selection
        3. 9.2.2.3 Paralleling Devices
        4. 9.2.2.4 Cascading Devices
        5. 9.2.2.5 Regulating VOUT
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.5 Electrical Characteristics

Unless otherwise specified, typical limits are for TJ = 25°C, minimum and maximum limits apply over the full operating temperature range: V+ = 5 V, C1 = C2 = 10 μF.(1)
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
V+Supply voltage1.85.5V
IQSupply currentNo load4090µA
ILOutput current2.5 V ≤ V+ ≤ 5.5 V15mA
1.8 V ≤ V+ < 2.5 V 10 mA
ROUTOutput resistance(2)IL = 15 mA2040Ω
ƒOSCOscillator frequencySee(3)82250kHz
ƒSWSwitching frequencySee(3)41125kHz
PEFFPower efficiencyRL (5 kΩ) between GND and OUT98%
IL = 15 mA to GND96%
VOEFFVoltage conversion efficiencyNo load99.96%
(1) In the test circuit, capacitors C1 and C2 are 10-µF, 0.3-Ω maximum ESR capacitors. Capacitors with higher ESR may increase output resistance, and reduce output voltage and efficiency.
(2) Specified output resistance includes internal switch resistance and capacitor ESR. See the details in Section 9 for positive voltage doubler.
(3) The output switches operate at one half of the oscillator frequency, ƒOSC = 2 × ƒSW.