SNOSBT3J January   2000  – March 2022 LM158-N , LM258-N , LM2904-N , LM358-N

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics: LM158A, LM358A, LM158, LM258
    6. 6.6 Electrical Characteristics: LM358, LM2904
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Noninverting DC Gain
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
      2. 8.2.2 System Examples
        1. 8.2.2.1 Typical Single-Supply Applications
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 Support Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

10.1 Layout Guidelines

For single-ended supply configurations, the V+ pin should be bypassed to ground with a low ESR capacitor. The optimum placement is closest to the V+ pin. Care should be taken to minimize the loop area formed by the bypass capacitor connection between V+ and ground. The ground pin should be connected to the PCB ground plane at the pin of the device. The feedback components should be placed as close to the device as possible to minimize stray parasitics.

For dual supply configurations, both the V+ pin and V- pin should be bypassed to ground with a low ESR capacitor. The optimum placement is closest to the corresponding supply pin. Care should be taken to minimize the loop area formed by the bypass capacitor connection between V+ or V- and ground. The feedback components should be placed as close to the device as possible to minimize stray parasitics.

For both configurations, as ground plane underneath the device is recommended.