SNVS770I June   1999  – January 2015 LM2941 , LM2941C

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics: LM2941T, LM2941S, LM2941LD
    6. 6.6 Electrical Characteristics: LM2941CT, LM2941CS
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Short-Circuit Current Limit
      2. 7.3.2 Overvoltage Shutdown (OVSD)
      3. 7.3.3 Thermal Shutdown (TSD)
      4. 7.3.4 Thermal Overload Protection
    4. 7.4 Device Functional Modes
      1. 7.4.1 Operation With ON/OFF Control
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Output Capacitor
        2. 8.2.2.2 Setting the Output Voltage
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Power Dissipation
    4. 10.4 Thermal Considerations
      1. 10.4.1 TO-263 Mounting
      2. 10.4.2 WSON Mounting
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Definition of Terms
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Related Links
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • NDH|5
  • NEB|5
  • KTT|5
  • KC|5
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

8.1 Application Information

Figure 18 shows the typical application circuit for the LM2941. The output capacitor, COUT, must have a capacitance value of at least 22 µF with an equivalent series resistance (ESR) of at least 100 mΩ, but no more than 1 Ω. The minimum capacitance value and the ESR requirements apply across the entire expected operating ambient temperature range.

8.2 Typical Application

882303.png
882330.png
Note: Using 1 kΩ for R1 will ensure that the bias current error from the adjust pin will be negligible. Do not bypass R1 or R2. This will lead to instabilities.
* Required if regulator is located far from power supply filter.
** COUT must be at least 22 μF to maintain stability. May be increased without bound to maintain regulation during transients. Locate as close as possible to the regulator. This capacitor must be rated over the same operating temperature range as the regulator and the ESR is critical.
Figure 18. 5-V to 20-V Adjustable Regulator

8.2.1 Design Requirements

DESIGN PARAMETER EXAMPLE VALUE
Input voltage range 10 V to 26 V
Output voltage 15 V
Output current range 5 mA to 1 A
Input capacitor value 0.47 µF
Output capacitor value 22 µF minimum
Output capacitor ESR range 100 mΩ to 1 Ω

8.2.2 Detailed Design Procedure

8.2.2.1 Output Capacitor

A tantalum capacitor with a minimum capacitance value of 22 μF, and ESR in the range of 0.01 Ω to 5 Ω, is required at the output pin for loop stability. It must be located less than 1 cm from the device. There is no limitation on any additional capacitance.

Alternately, a high quality X5R/X7R 22 μF ceramic capacitor may be used for the output capacitor only if an appropriate value of series resistance is added to simulate the ESR requirement. The ceramic capacitor selection must include an appropriate voltage de-rating of the capacitance value due to the applied output voltage. The series resistor (for ESR simulation) should be in the range of 0.1 Ω to 1 Ω.

8.2.2.2 Setting the Output Voltage

The output voltage range is 5 V to 20 V and is set by the two external resistors, R1 and R2. See the Figure 18. The output voltage is given by the formula:

Equation 1. VOUT = VREF × ((R1 + R2) / R1)

where

  • VREF is typically 1.275 V

Using 1 kΩ for R1 will ensure that the bias current error of the adjust pin will be negligible. Using a R1 value higher than 10 kΩ may cause the output voltage to shift across temperature due to variations in the adjust pin bias current.

Calculating the upper resistor (R2) value of the pair when the lower resistor (R1) value is known is accomplished with the following formula:

Equation 2. R2 = R1 × ((VOUT / VREF) – 1)

The resistors used for R1 and R2 should be high quality, tight tolerance, and with matching temperature coefficients. It is important to remember that, although the value of VREF is ensured, the final value of VOUT is not. The use of low quality resistors for R1 and R2 can easily produce a VOUT value that is unacceptable.

8.2.3 Application Curves

882321.pngFigure 19. Low Voltage Behavior
882325.pngFigure 20. Output at Voltage Extremes