The LM3017 device is a versatile low-side NFET controller incorporating true shutdown and input side current limiting. The LM3017 is designed for simple implementation of boost conversions in Thunderbolt™ Technology. The LM3017 can also be configured for flyback or SEPIC designs. The input voltage range of 5 V to 18 V accommodates a two- or three-cell lithium ion battery or a 12-V rail. The enable pin accepts a single input to drive three different modes of operation: boost, pass-through, or shutdown mode. The LM3017 draws very low current in shutdown mode, typically 40 nA from the input supply.
The LM3017 provides an adjustable output to drive the Power Load Switch or MUX for the host Thunderbolt™ port. The ability to drive an external high-side NMOS provides for true isolation of the load from the input. Current limiting on the input ensures that inrush and short-circuit currents are always under control. The LM3017 incorporates built-in thermal shutdown, cycle-by-cycle current limit, short-circuit protection, output overvoltage protection, and soft start. It is available in a 10-pin WQFN package.
PART NUMBER | PACKAGE | BODY SIZE (NOM) |
---|---|---|
LM3017 | WQFN (10) | 2.40 mm × 2.70 mm |
Changes from C Revision (March 2013) to D Revision
Changes from B Revision (November 2012) to C Revision
PIN | TYPE(1) | DESCRIPTION | ||
---|---|---|---|---|
NO. | NAME | |||
1 | VCC | O | Driver supply voltage pin: output of internal regulator powering low side NMOS driver. A minimum of 0.47 µF must be connected from this pin to PGND for proper operation. | |
2 | DR | O | Low-side NMOS gate driver output: output gate drive to low side NMOS gate. | |
3 | PGND | G | Power ground: ground for power section. External power circuit reference. Must be connected to AGND at a single point. | |
4 | VG | O | High side NMOS gate driver output: output gate drive to high side NMOS gate. | |
5 | EN/MODE | A | Multi-function input pin: this input provides for chip enable, and mode selection. See Device Functional Modes for details. | |
6 | FB | A | Feed-back input pin: negative input to error amplifier. Connect to feedback resistor tap to regulate output. | |
7 | COMP | A | Compensation pin: a resistor and capacitor combination connected to this pin provides frequency compensation for the regulator control loop. | |
8 | AGND | G | Analog ground: ground for analog control circuitry. Reference point for all stated voltages. | |
9 | ISEN | A | Current sense input: current sense input, with respect to VIN, for all current limit functions. | |
10 | VIN | P | Power supply input pin: input supply to regulator. See Application and Implementation for recommendations on bypass capacitors on this pin. |
MIN | MAX | UNIT | ||
---|---|---|---|---|
VIN to PGND, AGND | –0.3 | 20 | V | |
FB, COMP, VCC,DR to PGND, AGND | –0.2 | 6 | V | |
EN/MODE | –0.2 | 5.5 | V | |
VG | –0.3 | VIN + 6 | V | |
ISEN to PGND, AGND | VIN – 0.3 | VIN | V | |
Peak low side driver output current | 1 | A | ||
Power dissipation | Internally limited | |||
Junction temperature, TJ | 150 | °C | ||
Storage temperature, Tstg | –65 | 150 | °C |
VALUE | UNIT | |||
---|---|---|---|---|
V(ESD) | Electrostatic discharge | Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) | ±1500 | V |
MIN | MAX | UNIT | ||
---|---|---|---|---|
VIN | Supply voltage | 5.4 | 18 | V |
TJ | Junction temperature | –40 | 125 | °C |
THERMAL METRIC(1) | LM3017 | UNIT | |
---|---|---|---|
NKL (WQFN) | |||
10 PINS | |||
RθJA | Junction-to-ambient thermal resistance | 79.2 | °C/W |
RθJC(top) | Junction-to-case (top) thermal resistance | 29.8 | °C/W |
RθJB | Junction-to-board thermal resistance | 21.4 | °C/W |
ψJT | Junction-to-top characterization parameter | 0.6 | °C/W |
ψJB | Junction-to-board characterization parameter | 20.7 | °C/W |
RθJC(bot) | Junction-to-case (bottom) thermal resistance | — | °C/W |
PARAMETER | TEST CONDITIONS | MIN(1) | TYP(2) | MAX(1) | UNIT | |
---|---|---|---|---|---|---|
VFB | Feedback voltage | Vcomp = 1.4 V | 1.256 | 1.27 | 1.282 | V |
ΔVLINE | Feedback voltage line regulation | 5 V ≤ VIN ≤ 18 V | 0.33% | |||
VUVLO | Input undervoltage lockout voltage | Rising | 4.6 | 4.82 | 4.9 | V |
Input undervoltage lockout hysteresis | Falling, below VUVLO | 280 | mV | |||
FSW | Nominal switching frequency | EN/MODE = 1.6 V | 550 | 600 | 635 | kHz |
RDS(ON) | Low-side NMOS driver resistance, top driver FET |
VIN = 5 V, IDR = 0.2 A | 3.4 | Ω | ||
Low-side NMOS driver resistance, bottom driver FET |
VIN = 5 V, IDR = 0.2 A | 1 | ||||
VCC | Driver voltage supply | VIN < 6 V | VIN | V | ||
VIN ≥ 6 V | 5.6 | |||||
Dmax | Maximum duty cycle | 86% | ||||
Tmin(on) | Minimum on-time | 125 | ns | |||
IQ-boost | Supply current in boost mode, no switching |
EN/MODE = 1.6 V, FB = 1.4 V | 5.2 | 9 | mA | |
IQ-SD | Supply current in shutdown mode | EN/MODE pin = 0.4 V | 0.025 | 1 | µA | |
IQ-pass | Supply current in pass-through mode | EN/MODE = 2.6 V, FB = 1.4 V | 1.4 | 2.3 | mA | |
Ven-pass | Pass-through mode threshold(3) | Rising | 2.19 | 2.4 | 2.56 | V |
Vmode-hyst | Mode change hysteresis, falling(3) | Falling | 65 | 107 | 165 | V |
Ven-shutdown | Shutdown mode threshold(3) | Falling | 0.2 | 0.4 | 0.59 | V |
Ven-boost | Boost mode enable window(3) | Rising | 0.65 | 1.22 | 1.6 | V |
Ien | EN/MODE pin bias current(4) | EN/MODE = 1.6 V | ±1 | µA | ||
VSENSE | Cycle-by-cycle current limit threshold during boost mode | EN/MODE = 1.6 V, FB = 50 V | 142 | 170 | 182 | mV |
ΔVSC | Short-circuit current limit threshold during boost mode | EN/MODE = 1.6 V, FB = 0 V | 18 | 30 | 42 | mV |
VSL | Internal ramp compensation voltage | 90 | mV | |||
VLIM1 | Input current limit threshold voltage in pass-through mode during TLIM1(3) | EN/MODE = 2.6 V | 70 | 85 | 95 | mV |
ΔVLIM2 | Input current limit threshold voltage in pass-through mode during TLIM2(3) | EN/MODE = 2.6 V | 14.5 | 18 | 21 | mV |
TLIM1 | Curent limit time at TLIM1(3) | 900 | µs | |||
TLIM2 | Current limit time at TLIM2(3) | 3.6 | ms | |||
TSC | Current limit time at TSC(3) | 900 | µs | |||
VOVP | Upper-output overvoltage protection threshold | Rising threshold measured at FB pin with respect to FB pin, VCOMP = 1.45 V | 40 | mV | ||
Lower-output overvoltage protection threshold | Falling threshold measured at FB pin with respect to FB pin, VCOMP = 1.45 V | 26 | ||||
VGS-on | On-state drive voltage at VG pin(5) | VIN = 5 V, ISEN = 5 V, IG = 0 A | 3.8 | 4.9 | V | |
VGS-off | Off-state drive voltage at VG pin(6) | Vin = 5 V, ISEN = VIN – 200 mV, IG = 0 A | 5 | mV | ||
IG | Maximum drive current at VG pin | VIN = 5 V, ISEN = 5 V, VG = VIN | 20 | µA | ||
Gm | Error amplifier transconductance | VCOM = 1.4 V, ICOMP = ±50 µA | 340 | 522 | 900 | µA/V |
AVOL | Error amplifier open-loop voltage gain | VCOM = 1.2 V to 1.8 V, ICOMP = 0 A | 190 | 313 | 450 | V/V |
RO | Error amplifier open-loop output resistance(7) | 600 | kΩ | |||
IEAO | Error amplifier output current swings | Sourcing: VCOMP = 1.4 V, VFB = 1.1 V | 27 | 66 | 115 | µA |
Sinking: VCOMP = 1.4 V, VFB = 1.4 V | 49 | 68 | 125 | |||
VEAO | Error amplifier output voltage limits | Upper: VFB = 0 V, COMP pin floating | 2.3 | V | ||
Lower: VFB = 1.4 V | 0.82 | |||||
Tr | Drive pin rise time | Cload = 3 nF, VDR = 0 V to 3 V | 25 | ns | ||
Tf | Drive pin fall time | Cload = 3 nF, VDR = 3 V to 0 V | 25 | ns | ||
TSD | Thermal shutdown threshold | 165 | °C | |||
TSD-hyst | Thermal shutdown threshold hysteresis | 10 | °C |
VOUT = 15 V |
VIN = 8 V |
The LM3017 uses a fixed frequency, Pulse Width Modulated (PWM), current mode control architecture. A high-side current sense amplifier provides inductor current information by sensing the voltage drop across RSEN. The voltage across this resistor is fed into the ISEN pin. This voltage is then level shifted and fed into the positive input of the PWM comparator. As with all architectures of this type, a compensation ramp is required to ensure stability of the current control loop under all operating conditions. A nominal value of the ramp is provided internally while additional ramp can be added through the ISEN pin. The output voltage is sensed through an external feedback resistor divider network and fed into the error amplifier (EA) negative input (feedback pin, FB). The output of the error amplifier (COMP pin) is added to the slope compensation ramp and fed into the negative input of the PWM comparator.
At the start of any switching cycle, the oscillator sets a high signal on the DR pin (gate of the external MOSFET) and the external MOSFET turns on. When the voltage on the positive input of the PWM comparator exceeds the negative input, the Drive Logic is reset and the external MOSFET turns off.
Under extremely light load or no-load conditions, the energy delivered to the output capacitor when the external MOSFET is on during the minimum on time is more than what is delivered to the load. An overvoltage comparator inside the LM3017 prevents the output voltage from rising under these conditions by sensing the feedback (FB pin) voltage and resetting the RS latch. The latch remains in a reset state until the output decays to the nominal value. Thus the operating frequency decreases at light loads, resulting in excellent efficiency.
The LM3017 incorporates circuitry to control a high side NMOS transistor in series with the inductor. This feature is used to disconnect the load from the input supply and protect the system from shorts on the output. Using an NMOS, rather than a PMOS transistor, saves the use of a diode from the inductor to ground. When the NMOS is turned off, the inductor brings the source belowground, keeping it on until the current is safely brought to zero. A built-in charge pump supplies typically VIN+ 5 V to drive the gate of this NMOS.
The EN/MODE pin is used to control the modes of the regulator by driving the high side gate (VG pin) to enable or disable the output through the pass MOSFET. Furthermore, it defines the current limit for each operation mode (see Device Functional Modes). Table 1 shows the modes versus the voltage on the EN/MODE pin.
EN/MODE PIN VOLTAGE | MODE |
---|---|
≤ 0.4 V | Shutdown |
1.6 V to 2.2 V | Boost |
≥ 2.6 V | Pass-through |
Figure 13 shows the output voltage behavior in the various operation modes.
As stated previously, the EN/MODE pin controls the state of the LM3017. As with any digital input, the voltage on this pin must not be allowed to slowly cross the various thresholds. Although hysteresis is used on this input, slowly varying signal may cause unpredictable behavior. Also, the EN/MODE pin must not be allowed to float. One way to control the LM3017, from digital logic, is to use the circuit shown in Figure 14. The resistor values are adjusted based on the above table and the logic supply used. The MOSFET can be any small signal device, such as the 2N7002.
The LM3017 incorporates output overvoltage protection (OVP). At light, or no load the minimum switch on-time may not be short enough to allow regulation in constant frequency PWM mode. In these cases, the output voltage (and therefore the voltage on the FB pin) tries to rise. When the voltage on the FB pin reaches approximately 20 mV higher than the regulation point, the power switch (Q1) is turned off. Q1 remains off until the FB voltage drops back to the regulation point, at which time normal switching begins again. In this way, the LM3017 prevents the output voltage from rising too high with no load on the output.
Internal thermal shutdown circuitry is provided to protect the LM3017 in the event that the maximum junction temperature is exceeded. When activated, typically at 165°C, the controller is forced into a low-power standby state, disabling the output driver and the VCC regulator. After the temperature is reduced (typical hysteresis is 10°C), the VCC regulator is re-enabled and the LM3017 performs a soft start.
The LM3017 implements current limit protection by controlling the pass FET, Q2.
In boost mode the LM3017 features both cycle-by-cycle current limit and short-circuit protection. Unlike most boost regulators, the LM3017 can protect itself from short circuits on the output by shutting off the pass FET. The boost current limit, defined by VCL= 170 mV in Electrical Characteristics, turns off the boost FET for normal overloads on a cycle-by-cycle basis. The current is limited to VCL / RSEN until the overload is removed. If the output must be shorted, or otherwise pulled below VIN, the inductor current has a tendency to run-away. This is prevented by the short-circuit protection feature, defined as VSC = 200 mV in Electrical Characteristics. When this current limit is tripped, the current is limited to VSC / RSEN by controlling the pass FET. If the short persists for
TSC > 450 µs the pass FET is latched off. In this way, the current is limited to VSC / Rsen until the short is removed or the time of TSC = 450 µs is completed. Pulling the EN/MODE pin low (< 0.4 V, typical) is required to reset this short-circuit latch-off mode. The delay of TSC = 450 µs helps to prevent nuisance latch-off during a momentary short on the output.
Pulling the EN/MODE pin to less than 0.4 V (typical), during any mode of operation, places the part in full shutdown mode. The boost regulator and the pass FET is off and the load is disconnected from the input supply. In this mode, the regulator draws a maximum of 1 µA from the input supply.
The boost regulator can be turned on by bringing the EN/MODE pin to greater than 1.6 V, but less than 2.2 V. This is the run mode for the boost regulator. Note that the LM3017 always starts in pass-through and transitions to boost mode.
Setting the EN/MODE pin to greater than 2.6 V (typical), places the part in pass-through mode. The boost regulator is off and the pass MOSFET is on. During this mode, the load is connected to the input supply through the inductor and power diode, and is fully protected from output short circuits.
During start-up in boost mode, peak inductor current may be higher compared to normal operation. To allow for this, current limit levels and timing are different during start-up. The current limit is defined by VLIM2 = 100 mV (typical) in Electrical Characteristics, for the first TLIM2 = 3.6 ms (typical). The current is limited to VLIM2 / RSEN, for this period. Once the TLIM2 = 3.6 ms (typical) timer has finished, the current limit is increased to VSC = 200 mV (typical). For the first TLIM2 = 3.6 ms (typical) of the start-up, the latch-off feature is not enabled; however, the current is always limited to VLIM2 / RSEN. This allows the part to start up normally. If the current limit is still tripped at the end of TLIM2 = 3.6 ms (typical) , the TSC = 900 µs (typical) timer is started. Once the TSC = 900 µs (typical) time has expired, the pass FET (Q2) is latched off. This gives a total current-limited time of TSC + TLIM2 = 4.05 ms (typical), in cases where the LM3017 is started into a short circuit at the output.
In pass-through mode the power path is protected from shorts and overloads by the current limit defined as
VLIM1 = 85 mV (typical) in Electrical Characteristics. When this current limit is tripped, the current is limited to VLIM1 / RSEN by controlling the pass FET. If the short persists for TLIM1 > 900 µs (typical) the pass FET (Q2) is latched off. In this way, the current is limited to VLIM1 / RSEN until the short is removed or the time of
TLIM1 = 900 µs (typical) is completed. Pulling the EN/MODE pin low (0.4 V, typical) is required to reset this latch-off mode.
During start-up in pass mode, the current limit is defined by VLIM2 = 100 mV (typical) in Electrical Characteristics, for the first TLIM2 = 3.6 ms (typical). The current is limited to VLIM2 / RSEN, for this period. Once the TLIM2 = 3.6 ms (typical) timer has finished, the current limit is reduced to VLIM1 = 85 mV (typical). For the first TLIM2 = 3.6 ms (typical) of the start-up, the latch-off feature is not enabled; however, the current is always limited to VLIM2 / RSEN. This higher limit allows the part to start up normally. If the current limit is still tripped at the end of TLIM2 = 3.6 ms (typical), the TLIM1 = 900 µs (typical) timer is started. Once the TLIM1= 900 µs time has expired, the pass FET(Q2) is latched off. This gives a total current-limited time of TLIM1+ TLIM2 = 4.5 ms (typical), in cases where the LM3017 is started into a short circuit at the output.