The LM3409, LM3409-Q1, LM3409HV, and LM3409HV-Q1 are P-channel MOSFET (PFET) controllers for step-down (buck) current regulators. They offer wide input voltage range, high-side differential current sense with low adjustable threshold voltage and fast output enable/disable function and a thermally enhanced 10-pin, HVSSOP package. These features combine to make the LM3409 family of devices ideal for use as constant current sources for driving LEDs where forward currents up to 5 A are easily achievable.
The LM3409 devices use constant off-time (COFT) control to regulate an accurate constant current without the need for external control loop compensation. Analog and PWM dimming are easy to implement and result in a highly linear dimming range with excellent achievable contrast ratios. Programmable UVLO, low-power shutdown, and thermal shutdown complete the feature set.
PART NUMBER | PACKAGE | BODY SIZE (NOM) |
---|---|---|
LM3409 | HVSSOP (10) | 3.00 mm × 3.00 mm |
PDIP (14) | 19.177 mm × 6.35 mm | |
LM3409-Q1 | HVSSOP (10) | 3.00 mm × 3.00 mm |
LM3409HV | ||
LM3409HV-Q1 |
Changes from K Revision (July 2014) to L Revision
Changes from J Revision (May 2013) to K Revision
Changes from I Revision (May 2013) to J Revision
PIN | DESCRIPTION | ||
---|---|---|---|
NAME | PDIP | HVSSOP | |
UVLO | 1 | 1 | Input undervoltage lockout. Connect to a resistor divider from VIN and GND. Turn-on threshold is 1.24 V and hysteresis for turnoff is provided by a 22 µA current source. |
IADJ | 3 | 2 | Analog LED current adjust. Apply a voltage from 0 to 1.24 V, connect a resistor to GND, or leave open to set the current sense threshold voltage. |
EN | 4 | 3 | Logic level enable and PWM dimming. Apply a voltage >1.74 V to enable device, a PWM signal to dim, or a voltage < 0.5 V for low-power shutdown. |
COFF | 5 | 4 | Off-time programming. Connect resistor from VO, capacitor to GND to set off-time. |
GND | 6 | 5 | Connect to system ground. |
PGATE | 9 | 6 | Gate drive. Connect to gate of external P-channel MOSFET. |
CSN | 10 | 7 | Negative current sense. Connect to negative side of sense resistor. |
CSP | 11 | 8 | Positive current sense. Connect to positive side of sense resistor (also to VIN). |
VCC | 12 | 9 | VIN– referenced linear regulator output. Connect at least a 1-µF ceramic capacitor to VIN. The regulator provides power for the P-channel MOSFET drive. |
VIN | 14 | 10 | Input voltage. Connect to the input voltage. |
Thermal pad | — | Connect to GND pin. Place 4 to 6 vias from thermal pad to GND plane. |
VALUE | UNIT | ||||
---|---|---|---|---|---|
LM3409 IN DGQ AND NFF PACKAGES | |||||
V(ESD) | Electrostatic discharge | Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1) | ±1000 | V | |
Charged device model (CDM), per JEDEC specification JESD22-C101, all pins(2) | ±1000 | ||||
LM3409-Q1 IN DGQ AND NFF PACKAGES | |||||
V(ESD) | Electrostatic discharge | Human body model (HBM), per AEC Q100-002(3)(4) | ±2000 | V | |
Charged device model (CDM), per AEC Q100-011 | ±1000 |
MIN | MAX | UNIT | |||
---|---|---|---|---|---|
VIN | LM3409, LM3409-Q1 | 6 | 42 | V | |
LM3409HV, LM3409HV-Q1 | 6 | 75 | |||
Junction temperature range, TJ | −40 | 125 | °C |
THERMAL METRIC(1) | LM3409, LM3409-Q1, LM3409HV, LM3409HV-Q1 |
LM3409 | UNIT | |
---|---|---|---|---|
DGQ (HVSSOP) |
NFF (PDIP) |
|||
10 PINS | 14 PINS | |||
RθJA | Junction-to-ambient thermal resistance | 54.4 | 49 | °C/W |
RθJC(top) | Junction-to-case (top) thermal resistance | 53.7 | 36.3 | °C/W |
RθJB | Junction-to-board thermal resistance | 33.8 | 28.9 | °C/W |
ψJT | Junction-to-top characterization parameter | 3.9 | 21.1 | °C/W |
ψJB | Junction-to-board characterization parameter | 33.5 | 28.7 | °C/W |
RθJC(bot) | Junction-to-case (bottom) thermal resistance | 3.5 | N/A | °C/W |
PARAMETER | TEST CONDITIONS | MIN(1) | TYP(2) | MAX(1) | UNIT | |
---|---|---|---|---|---|---|
PEAK CURRENT COMPARATOR | ||||||
VCST | VCSP – VCSN average peak current threshold(3) | VADJ = 1 V | 188 | 198 | 208 | mV |
VADJ = VADJ-OC | 231 | 246 | 261 | |||
AADJ | VADJ to VCSP – VCSN threshold gain | 0.1 < VADJ < 1.2 V VADJ = VADJ-OC |
0.2 | V/V | ||
VADJ-OC | IADJ pin open circuit voltage | 1.189 | 1.243 | 1.297 | V | |
IADJ | IADJ pin current | 3.8 | 5 | 6.4 | µA | |
tDEL | CSN pin falling delay | CSN fall - PGATE rise | 38 | ns | ||
SYSTEM CURRENTS | ||||||
IIN | Operating input current | Not switching | 2 | mA | ||
ISD | Shutdown input current | EN = 0 V | 110 | µA | ||
PFET DRIVER | ||||||
RPGATE | Driver output resistance | Sourcing 50 mA | 2 | Ω | ||
Sinking 50 mA | 2 | |||||
VCC REGULATOR | ||||||
VCC | VIN pin voltage - VCC pin voltage | VIN > 9 V 0 < ICC < 20 mA |
5.5 | 6 | 6.5 | V |
VCC-UVLO | VCC undervoltage lockout threshold | VCC increasing | 3.73 | V | ||
VCC-HYS | VCC UVLO hysteresis | VCC decreasing | 283 | mV | ||
ICC-LIM | VCC regulator current limit | 30 | 45 | mA | ||
OFF-TIMER AND ON-TIMER | ||||||
VOFT | Off-time threshold | 1.122 | 1.243 | 1.364 | V | |
tD-OFF | COFF threshold to PGATE falling delay | 25 | ns | |||
tON-MIN | Minimum ON-time | 115 | 211 | ns | ||
tOFF-MAX | Maximum OFF-time | 300 | µs | |||
UNDERVOLTAGE LOCKOUT | ||||||
IUVLO | UVLO pin current | VUVLO = 1 V | 10 | nA | ||
VUVLO-R | Rising UVLO threshold | 1.175 | 1.243 | 1.311 | V | |
IUVLO-HYS | UVLO hysteresis current | 22 | µA | |||
ENABLE | ||||||
IEN | EN pin current | 10 | nA | |||
VEN-TH | EN pin threshold | VEN rising | 1.74 | V | ||
VEN falling | .5 | |||||
VEN-HYS | EN pin hysteresis | 420 | mV | |||
tEN-R | EN pin rising delay | EN rise - PGATE fall | 42 | ns | ||
tEN-F | EN pin falling delay | EN fall - PGATE rise | 21 | ns |