SNVSB95 July   2019 LM3421-Q1 , LM3423-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Typical Boost Application
  4. 4 Revision History
  5. 5 Device Comparison
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Current Regulators
      2. 8.3.2  Predictive Off-Time (PRO) Control
      3. 8.3.3  Average LED Current
      4. 8.3.4  Analog Dimming
      5. 8.3.5  Current Sense and Current Limit
      6. 8.3.6  Overcurrent Protection
      7. 8.3.7  Zero Current Shutdown
      8. 8.3.8  Control Loop Compensation
      9. 8.3.9  Start-Up Regulator
      10. 8.3.10 Overvoltage Lockout (OVLO)
      11. 8.3.11 Input Undervoltage Lockout (UVLO)
        1. 8.3.11.1 UVLO Only
        2. 8.3.11.2 PWM Dimming and UVLO
      12. 8.3.12 PWM Dimming
      13. 8.3.13 LM3423-Q1 Only: DPOL, FLT, TIMR, and LRDY
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Inductor
      2. 9.1.2 LED Dynamic Resistance
      3. 9.1.3 Output Capacitor
      4. 9.1.4 Input Capacitors
      5. 9.1.5 Main MOSFET / Dimming MOSFET
      6. 9.1.6 Re-Circulating Diode
      7. 9.1.7 Boost Inrush Current
      8. 9.1.8 Switching Frequency
    2. 9.2 Typical Applications
      1. 9.2.1 Basic Topology Schematics
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1  Operating Point
          2. 9.2.1.2.2  Switching Frequency
          3. 9.2.1.2.3  Average LED Current
          4. 9.2.1.2.4  Inductor Ripple Current
          5. 9.2.1.2.5  LED Ripple Current
          6. 9.2.1.2.6  Peak Current Limit
          7. 9.2.1.2.7  Loop Compensation
          8. 9.2.1.2.8  Input Capacitance
          9. 9.2.1.2.9  N-channel FET
            1. 9.2.1.2.9.1 Boost and Buck-Boost
          10. 9.2.1.2.10 Diode
          11. 9.2.1.2.11 Output OVLO
          12. 9.2.1.2.12 Input UVLO
          13. 9.2.1.2.13 PWM Dimming Method
          14. 9.2.1.2.14 Analog Dimming Method
      2. 9.2.2 LM3421 Buck-Boost Application
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
          1. 9.2.2.2.1  Operating Point
          2. 9.2.2.2.2  Switching Frequency
          3. 9.2.2.2.3  Average LED Current
          4. 9.2.2.2.4  Inductor Ripple Current
          5. 9.2.2.2.5  Output Capacitance
          6. 9.2.2.2.6  Peak Current Limit
          7. 9.2.2.2.7  Loop Compensation
          8. 9.2.2.2.8  Input Capacitance
          9. 9.2.2.2.9  N-channel FET
          10. 9.2.2.2.10 Diode
          11. 9.2.2.2.11 Input UVLO
          12. 9.2.2.2.12 Output OVLO
        3. 9.2.2.3 Application Curve
      3. 9.2.3 LM3421-Q1 BOOST Application
        1. 9.2.3.1 Design Requirements
        2. 9.2.3.2 Detailed Design Procedure
      4. 9.2.4 LM3421-Q1 Buck-Boost Application
        1. 9.2.4.1 Design Requirements
        2. 9.2.4.2 Detailed Design Procedure
      5. 9.2.5 LM3423-Q1 Boost Application
        1. 9.2.5.1 Design Requirements
        2. 9.2.5.2 Detailed Design Procedure
      6. 9.2.6 LM3421 Buck-Boost Application
        1. 9.2.6.1 Design Requirements
        2. 9.2.6.2 Detailed Design Procedure
      7. 9.2.7 LM3423 Buck Application
        1. 9.2.7.1 Design Requirements
        2. 9.2.7.2 Detailed Design Procedure
      8. 9.2.8 LM3423 Buck-Boost Application
        1. 9.2.8.1 Design Requirements
        2. 9.2.8.2 Detailed Design Procedure
      9. 9.2.9 LM3421 SEPIC Application
        1. 9.2.9.1 Design Procedure
        2. 9.2.9.2 Detailed Design Procedure
  10. 10Power Supply Recommendations
    1. 10.1 General Recommendations
    2. 10.2 Input Supply Current Limit
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Related Links
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9.2.1.2.7 Loop Compensation

Using a simple first order peak current mode control model, neglecting any output capacitor ESR dynamics, the necessary loop compensation can be determined.

First, the uncompensated loop gain (TU) of the regulator can be approximated:

Buck

Equation 53. LM3421-Q1 LM3423-Q1 30067323.gif

Boost and Buck-Boost

Equation 54. LM3421-Q1 LM3423-Q1 30067324.gif

Where the pole (ωP1) is approximated:

Buck

Equation 55. LM3421-Q1 LM3423-Q1 30067325.gif

Boost

Equation 56. LM3421-Q1 LM3423-Q1 30067326.gif

Buck-Boost

Equation 57. LM3421-Q1 LM3423-Q1 30067327.gif

And the RHP zero (ωZ1) is approximated:

Boost

Equation 58. LM3421-Q1 LM3423-Q1 30067328.gif

Buck-Boost

Equation 59. LM3421-Q1 LM3423-Q1 30067329.gif

And the uncompensated DC loop gain (TU0) is approximated:

Buck

Equation 60. LM3421-Q1 LM3423-Q1 30067330.gif

Boost

Equation 61. LM3421-Q1 LM3423-Q1 30067332.gif

Buck-Boost

Equation 62. LM3421-Q1 LM3423-Q1 30067333.gif

For all topologies, the primary method of compensation is to place a low frequency dominant pole (ωP2), which ensures that there is ample phase margin at the crossover frequency. This is accomplished by placing a capacitor (CCMP) from the COMP pin to AGND, which is calculated according to the lower value of the pole and the RHP zero of the system (shown as a minimizing function):

Equation 63. LM3421-Q1 LM3423-Q1 30067334.gif
Equation 64. LM3421-Q1 LM3423-Q1 30067335.gif

If analog dimming is used, CCMP should be approximately 4× larger to maintain stability as the LEDs are dimmed to zero.

A high-frequency compensation pole (ωP3) can be used to attenuate switching noise and provide better gain margin. Assuming RFS = 10 Ω, CFS is calculated according to the higher value of the pole and the RHP zero of the system (shown as a maximizing function):

Equation 65. LM3421-Q1 LM3423-Q1 30067336.gif
Equation 66. LM3421-Q1 LM3423-Q1 30067337.gif

The total system loop gain (T) can then be written as:

Buck

Equation 67. LM3421-Q1 LM3423-Q1 30067338.gif

Boost and Buck-Boost

Equation 68. LM3421-Q1 LM3423-Q1 30067339.gif