SNVSB96 July 2019 LM3424-Q1
PRODUCTION DATA.
Using a simple first order peak current mode control model, neglecting any output capacitor ESR dynamics, the necessary loop compensation can be determined.
First, the uncompensated loop gain (TU) of the regulator can be approximated:
Buck
Boost and Buck-Boost
Where the pole (ωP1) is approximated:
Buck
Boost
Buck-Boost
And the RHP zero (ωZ1) is approximated:
Boost
Buck-Boost
And the uncompensated DC loop gain (TU0) is approximated:
Buck
Boost
Buck-Boost
For all topologies, the primary method of compensation is to place a low frequency dominant pole (ωP2) which will ensure that there is ample phase margin at the crossover frequency. This is accomplished by placing a capacitor (CCMP) from the COMP pin to GND, which is calculated according to the lower value of the pole and the RHP zero of the system (shown as a minimizing function):
If analog dimming is used, CCMP should be approximately 4x larger to maintain stability as the LEDs are dimmed to zero.
A high frequency compensation pole (ωP3) can be used to attenuate switching noise and provide better gain margin. Assuming RFS = 10Ω, CFS is calculated according to the higher value of the pole and the RHP zero of the system (shown as a maximizing function):
The total system loop gain (T) can then be written as:
Buck
Boost and Buck-Boost