The LM3481-Q1 uses a current mode control scheme. The main advantages of current mode control are inherent cycle-by-cycle current limit for the switch and simpler control loop characteristics. It is easy to parallel power stages using current mode control because current sharing is automatic. However there is a natural instability that will occur for duty cycles, D, greater than 50% if additional slope compensation is not addressed as described below.

The current mode control scheme samples the inductor current, I_L, and compares the sampled signal, V_samp, to a internally generated control signal, V_c. The current sense resistor, R_SEN, as shown in the Figure 6-3, converts the sampled inductor current, I_L, to the voltage signal, V_samp, that is proportional to I_L such that:

The rising and falling slopes, M₁ and −M₂ respectively, of V_samp are also proportional to the inductor current rising and falling slopes, M_on and −M_off respectively. Where M_on is the inductor slope during the switch on-time and −M_off is the inductor slope during the switch off-time and are related to M₁ and −M₂ by:

For the boost topology:

Current mode control has an inherent instability for duty cycles greater than 50%, as shown in Figure 6-3, where the control signal slope, M_C, equals zero. In Figure 6-3, a small increase in the load current causes the sampled signal to increase by ΔV_samp0. The effect of this load change, ΔV_samp1, at the end of the first switching cycle is :

Equation 9.

From Equation 9, when D > 0.5, ΔV_samp1 will be greater than ΔV_samp0. In other words, the disturbance is divergent. So a very small perturbation in the load will cause the disturbance to increase. To ensure that the perturbed signal converges we must maintain:

Equation 10.

Figure 6-3 Subharmonic Oscillation for D>0.5

Figure 6-4 Compensation Ramp Avoids Subharmonic Oscillation

To prevent the subharmonic oscillations, a compensation ramp is added to the control signal, as shown in Figure 6-4.

With the compensation ramp, ΔV_samp1 and the convergence criteria are expressed by,

Equation 11.

Equation 12.

The compensation ramp has been added internally in the LM3481-Q1. The slope of this compensation ramp has been selected to satisfy most applications, and its value depends on the switching frequency. This slope can be calculated using the formula:

In Equation 13, V_SL is the amplitude of the internal compensation ramp and f_S is the controller's switching frequency. Limits for V_SL have been specified in the Section 5.5 section.

To provide the user additional flexibility, a patented scheme has been implemented inside the IC to increase the slope of the compensation ramp externally, if the need arises. Adding a single external resistor, R_SL(as shown in Figure 6-6) increases the amplitude of the compensation ramp as shown in Figure 6-5.

Figure 6-5 Additional Slope Compensation Added Using External Resistor R_SL

Where,

K = 40 µA typically and changes slightly as the switching frequency changes. Figure 6-7 shows the effect the current K has on ΔV_SLand different values of R_SL as the switching frequency changes.

A more general equation for the slope compensation ramp, M_C, is shown below to include ΔV_SL caused by the resistor R_SL.

It is good design practice to only add as much slope compensation as needed to avoid subharmonic oscillation. Additional slope compensation minimizes the influence of the sensed current in the control loop. With very large slope compensation the control loop characteristics are similar to a voltage mode regulator which compares the error voltage to a saw tooth waveform rather than the inductor current.

Figure 6-6 Increasing the Slope of the Compensation Ramp

Figure 6-7 ΔV_SL vs R_SL