SNVS656D September 2010 – October 2016 LM3492 , LM3492-Q1
PRODUCTION DATA.
MIN | MAX | UNIT | ||
---|---|---|---|---|
Input voltage | VIN, RT, VOUT to GND | −0.3 | 67 | V |
SW to GND | −0.3 | 67 | ||
SW to GND (Transient) | −2 (<100 ns) | |||
Output voltage | ILIM to GND | −0.3 | 0.3 | V |
FB to GND | −0.3 | 5 | ||
COMM, DIM1, DIM2, to GND | –0.3 | 6 | ||
Junction temperature, TJ | 150 | 150 | °C | |
Storage temperature, Tstg | −65 | 150 | °C |
VALUE | UNIT | |||
---|---|---|---|---|
V(ESD) | Electrostatic discharge | Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) | ±2000 | V |
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) | ±750 |
MIN | MAX | UNIT | |
---|---|---|---|
Supply voltage, VIN | 4.5 | 65 | V |
Operation temperature, TA | –40 | 125 | °C |
THERMAL METRIC(1) | LM3492, LM3492-Q1 | UNIT | |
---|---|---|---|
PWP (HTSSOP) | |||
20 PINS | |||
RθJA | Junction-to-ambient thermal resistance | 36.5 | °C/W |
RθJC(top) | Junction-to-case (top) thermal resistance | 20.8 | °C/W |
RθJB | Junction-to-board thermal resistance | 17.5 | °C/W |
ψJT | Junction-to-top characterization parameter | 0.5 | °C/W |
ψJB | Junction-to-board characterization parameter | 17.4 | °C/W |
RθJC(bot) | Junction-to-case (bottom) thermal resistance | 2 | °C/W |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
START-UP REGULATOR (VCC PIN) | ||||||
VVCC | Output voltage | CVCC = 0.47 µF, no load | 4.7 | 5.5 | 6.3 | V |
IVCC = 2 mA | 4.7 | 5.5 | 6.3 | V | ||
VCC_UVLO | VCC pin undervoltage lockout threshold (UVLO) | VVCC increasing, TA = TJ = 25°C | 3.56 | 3.78 | 4 | V |
VCC_UVLO-HYS | VCC pin UVLO hysteresis | VVCC decreasing | 310 | mV | ||
IIN | IIN operating current | No switching, VFB = 0 V | 3.6 | 5.2 | mA | |
IIN-SD | IIN operating current, device shutdown | VEN = 0 V | 30 | 95 | µA | |
IVCC | VCC pin current limit (1) | VVCC = 0 V | 18 | 30 | mA | |
VCC-VOUT | VCC pin output voltage when supplied by VOUT | VIN = Open, IVCC = 1 mA, VOUT = 18 V, TA = TJ = 25°C |
3.5 | 4.1 | 4.7 | V |
ENABLE INPUT | ||||||
VEN | EN pin input threshold | VEN rising | 1.55 | 1.63 | 1.71 | V |
VEN-HYS | EN pin threshold hysteresis | VEN falling | 194 | mV | ||
IEN-SHUT | Enable pullup current at shutdown | VEN = 0 V | 2 | µA | ||
IEN-OPER | Enable pullup current during operation | VEN = 2 V | 40 | µA | ||
CURRENT REGULATOR | ||||||
VIREF | IREF pin voltage | 4.5 V ≤ VIN ≤ 65 V | 1.231 | 1.256 | 1.281 | V |
VDHC50 | VIOUT under DHC | IOUT = 50 mA, RIREF = 25 kΩ | 0.16 | 0.225 | 0.29 | V |
VDHC100 | IOUT = 100 mA, RIREF = 12.5 kΩ | 0.38 | 0.48 | 0.58 | ||
VDHC200 | IOUT = 200 mA, RIREF = 6.25 kΩ | 0.81 | 0.99 | 1.17 | ||
IOUT50 | Current output under DHC | VIOUT = VDHC50, RIREF = 25 kΩ, TA = TJ = 25°C |
47.5 | 50 | 52.5 | mA |
VIOUT = VDHC50, RIREF = 25 kΩ | 46.5 | 50 | 53.5 | |||
IOUT100 | VIOUT = VDHC100, RIREF = 12.5 kΩ, TA = TJ = 25°C |
97 | 100 | 103 | ||
VIOUT = VDHC100, RIREF = 12.5 kΩ | 96 | 100 | 104 | |||
IOUT200 | VIOUT = VDHC200, RIREF = 6.25 kΩ, TA = TJ = 25°C |
194 | 200 | 206 | ||
VIOUT = VDHC200, RIREF = 6.25 kΩ | 192 | 200 | 208 | |||
IOUTOFF | Leakage at maximum work voltage | VDIM = 0, VIOUT = 65 V, TA = TJ = 25°C | 5 | µA | ||
VIOUT50-MIN | Minimum work voltage | IOUT = 50 mA, RIREF = 25 kΩ, IOUT = 0.98 × IOUT50, TA = TJ = 25°C |
0.1 | 0.15 | V | |
VIOUT100-MIN | IOUT = 100 mA, RIREF = 12.5 kΩ, IOUT = 0.98 × IOUT100, TA = TJ = 25°C |
0.2 | 0.35 | |||
VIOUT200-MIN | IOUT = 200 mA, RIREF = 6.25 kΩ, IOUT = 0.98 × IOUT200, TA = TJ = 25°C |
0.4 | 0.65 | |||
VDIM-HIGH | DIM voltage HIGH | 1.17 | V | |||
VDIM-LOW | DIM voltage LOW | 0.7 | V | |||
BOOST CONVERTER | ||||||
ICDHC-SRC | CDHC pin source current | VCDHC = 1.6 V, VFB = 3 V, VIOUT = 0 V, DIM = High |
60 | µA | ||
ICDHC-SINK | CDHC pin sink current | VCDHC = 1.6 V, VFB = 3 V, VIOUT = 3 V, DIM = High |
56 | µA | ||
ICDHC-LEAKAGE | CDHC pin leakage current | DIM = Low, VCDHC = 2.6 V, TA = TJ = 25°C | 5 | 46 | nA | |
ICL-MAX | Integrated MOSFET peak current limit threshold | 3.3 | 3.9 | 4.5 | A | |
ICL-HALF | Half integrated MOSFET peak current limit threshold | RILIM = 11 kΩ | 2 | A | ||
RDS(on) | Integrated MOSFET On-resistance | ISW = 500 mA | 0.19 | 0.43 | Ω | |
VFBTH-PWRGD | Power-Good FB pin threshold | 2.25 | V | |||
IFB | Feedback pin input current | VFB = 3 V, TA = TJ = 25°C | 1 | µA | ||
tON | ON timer pulse width | VIN = 12 V, VOUT = 65 V, RRT = 300 kΩ |
1460 | ns | ||
VIN = 24 V, VOUT = 32.5 V, RRT = 300 kΩ |
800 | |||||
VIN = 12 V, VOUT = 65 V, RRT = 100 kΩ |
550 | |||||
VIN = 24 V, VOUT = 32.5 V, RRT = 100 kΩ |
350 | |||||
tON(min)ILIM | ON timer minimum pulse width at current limit | 145 | ns | |||
tOFF | OFF timer pulse width | 145 | 350 | ns | ||
COMM PIN | ||||||
VIOUT-OV | IOUT pin overvoltage threshold | COMM goes LOW during VIOUT rising, other VIOUT = 1.2 V | 5.6 | 6.7 | 7.8 | V |
VCOMM-LOW | COMM pin at LOW | 5 mA into COMM | 0.7 | V | ||
ILEAK-FAULT | COMM pin open leakage | VCOMM = 5 V | 5 | µA | ||
THERMAL PROTECTION | ||||||
TOTM | Overtemperature indication | TJ rising | 135 | °C | ||
TOTM-HYS | Overtemperature indication hysteresis | TJ falling | 15 | °C | ||
TSD | Thermal shutdown temperature | TJ rising | 165 | °C | ||
TSD-HYS | Thermal shutdown temperature hysteresis | TJ falling | 20 | °C |