SNVS847F June 2012 – November 2017 LM34926
PRODUCTION DATA.
NOTE
Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.
The LM34926 device is step-down DC-DC converter. The device is typically used to convert a higher DC voltage to a lower DC voltage with a maximum available output current of 300 mA. Use the following design procedure to select component values for the LM34926 device. Alternately, use the WEBENCH® software to generate a complete design. The WEBENCH software uses an iterative design procedure and accesses a comprehensive database of components when generating a design. This section presents a simplified discussion of the design process.
Application Circuit: 20-V to 95-V Input and 10-V, 250-mA Output Isolated Fly-Buck™ Converter
Selection of external components is illustrated through a design example. Table 3 lists the design example specifications.
DESIGN PARAMETERS | VALUE |
---|---|
Input Voltage Range | 20 V to 95 V |
Primary Output Voltage | 10 V |
Secondary (Isolated) Output Voltage | 9.5 V |
Maximum Output Current (Primary + Secondary) | 250 mA |
Maximum Power Output | 2.5 W |
Nominal Switching Frequency | 750 kHz |
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The transformer turns ratio is selected based on the ratio of the primary output voltage to the secondary (isolated) output voltage. In this design example, the two outputs are nearly equal and a 1:1 turns ratio transformer is selected. Therefore, N2 / N1 = 1. If the secondary (isolated) output voltage is significantly higher or lower than the primary output voltage, a turns ratio less than or greater than 1 is recommended. The primary output voltage is normally selected based on the input voltage range such that the duty cycle of the converter does not exceed 50% at the minimum input voltage. This condition is satisfied if VOUT1 < VIN_MIN / 2
The total primary referred load current is calculated by multiplying the isolated output loads by the turns ratio of the transformer as shown in Equation 6.
The feedback resistors are selected to set the primary output voltage. The selected value for RFB1 is 1 kΩ. RFB2 can be calculated using the following equations to set VOUT1 to the specified value of 10 V. A standard resistor value of 7.32 kΩ is selected for RFB2.
Equation 1 is used to calculate the value of RON required to achieve the desired switching frequency.
where
For VOUT1 of 10 V and fSW of 750 kHz, the calculated value of RON is 148 kΩ. A lower value of 130 kΩ is selected for this design to allow for second-order effects at high switching frequency that are not included in Equation 9.
A coupled inductor or a flyback-type transformer is required for this topology. Energy is transferred from primary to secondary when the low-side synchronous switch of the buck converter is conducting.
The maximum inductor primary ripple current that can be tolerated without exceeding the buck switch peak current limit threshold (0.39-A minimum) is given by Equation 10.
Using the maximum peak-to-peak inductor ripple current ΔIL1 from Equation 10, the minimum inductor value is given by Equation 11.
A higher value of 47 µH is selected to insure the high-side switch current does not exceed the minimum peak current limit threshold.
In a conventional buck converter the output ripple voltage is calculated as shown in Equation 12.
To limit the primary output ripple voltage ΔVOUT1 to approximately 50 mV, an output capacitor COUT1 of 0.93 µF is required.
Figure 13 shows the primary winding current waveform (IL1) of a fly-buck converter. The reflected secondary winding current adds to the primary winding current during the buck switch off-time. Because of this increased current, the output voltage ripple is not the same as in conventional buck converter. The output capacitor value calculated in Equation 12 should be used as the starting point. Optimization of output capacitance over the entire line and load range must be done experimentally. If the majority of the load current is drawn from the secondary isolated output, a better approximation of the primary output voltage ripple is given by Equation 13.
A standard 1-µF, 25-V capacitor is selected for this design. If lower output voltage ripple is required, a higher value should be selected for COUT1 and/or COUT2.
A simplified waveform for secondary output current (IOUT2) is shown in Figure 14.
The secondary output current (IOUT2) is sourced by COUT2 during on-time of the buck switch, TON. Ignoring the current transition times in the secondary winding, the secondary output capacitor ripple voltage can be calculated using Equation 14.
For a 1:1 transformer turns ratio, the primary and secondary voltage ripple equations are identical. Therefore, COUT2 is chosen to be equal to COUT1 (1 µF) to achieve comparable ripple voltages on primary and secondary outputs.
If lower output voltage ripple is required, a higher value should be selected for COUT1 and/or COUT2.
Type III ripple circuit as described in Ripple Configuration is required for the Fly-Buck topology. Type I and Type II ripple circuits use series resistance and the triangular inductor ripple current to generate ripple at VOUT and the FB pin. The primary ripple current of a Fly-Buck is the combination or primary and reflected secondary currents as shown in Figure 13. In the fly-buck topology, Type I and Type II ripple circuits suffer from large jitter as the reflected load current affects the feedback ripple.
Selecting the Type III ripple components using the equations from Ripple Configuration ensures that the FB pin ripple is be greater than the capacitive ripple from the primary output capacitor COUT1. The feedback ripple component values are chosen as shown in Equation 15.
The calculated value for Rr is 66 kΩ. This value provides the minimum ripple for stable operation. A smaller resistance should be selected to allow for variations in TON, COUT1 and other components. For this design, Rr value of 46.4 kΩ is selected.
The reverse voltage across secondary-rectifier diode D1 when the high-side buck switch is off can be calculated using Equation 16.
For a VIN_MAX of 95 V and the 1:1 turns ratio of this design, a 100-V Schottky is selected.
A 1-µF capacitor of 16-V or higher rating is recommended for the VCC regulator bypass capacitor.
A good value for the BST pin bootstrap capacitor is 0.01-µF with a 16-V or higher rating.
The input capacitor is typically a combination of a smaller bypass capacitor located near the regulator IC and a larger bulk capacitor. The total input capacitance should be large enough to limit the input voltage ripple to a desired amplitude. For input ripple voltage ΔVIN, CIN can be calculated using Equation 17.
Choosing a ΔVIN of 0.5 V gives a minimum CIN of 0.167 μF. A standard value of 0.1 μF is selected for CBYP in this design. A bulk capacitor of higher value reduces voltage spikes due to parasitic inductance between the power source to the converter. A standard value of 1 μF is selected for CIN in this design. The voltage ratings of the two input capacitors should be greater than the maximum input voltage under all conditions.
UVLO resistors RUV1 and RUV2 set the undervoltage lockout threshold and hysteresis according to Equation 18 and Equation 19.
where
For a UVLO hysteresis of 2.5 V and UVLO rising threshold of 20 V, Equation 18 and Equation 19 require RUV1 of 8.25 kΩ and RUV2 of 127 kΩ and these values are selected for this design example.
Diode D2 is an optional diode connected between VOUT1 and the VCC regulator output pin. When VOUT1 is more than one diode drop greater than the VCC voltage, the VCC bias current is supplied from VOUT1. This results in reduced power losses in the internal VCC regulator which improves converter efficiency. VOUT1 must be set to a voltage at least one diode drop higher than 8.55 V (the maximum VCC voltage) if D2 is used to supply bias current.