SNVSB52A September   2018  – August 2021 LM34936

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Fixed Frequency Valley/Peak Current Mode Control with Slope Compensation
      2. 7.3.2  VCC Regulator and Optional BIAS Input
      3. 7.3.3  Enable/UVLO
      4. 7.3.4  Soft-Start
      5. 7.3.5  Overcurrent Protection
      6. 7.3.6  Average Input/Output Current Limiting
      7. 7.3.7  Operation Above 28-V Input
      8. 7.3.8  CCM Operation
      9. 7.3.9  Frequency and Synchronization (RT/SYNC)
      10. 7.3.10 Frequency Dithering
      11. 7.3.11 Output Overvoltage Protection (OVP)
      12. 7.3.12 Power Good (PGOOD)
      13. 7.3.13 Gm Error Amplifier
      14. 7.3.14 Integrated Gate Drivers
      15. 7.3.15 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown, Standby, and Operating Modes
      2. 7.4.2 MODE Pin Configuration
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  Custom Design with WEBENCH Tools
        2. 8.2.2.2  Frequency
        3. 8.2.2.3  VOUT
        4. 8.2.2.4  Inductor Selection
        5. 8.2.2.5  Output Capacitor
        6. 8.2.2.6  Input Capacitor
        7. 8.2.2.7  Sense Resistor (RSENSE)
        8. 8.2.2.8  Slope Compensation
        9. 8.2.2.9  UVLO
        10. 8.2.2.10 Soft-Start Capacitor
        11. 8.2.2.11 Dither Capacitor
        12. 8.2.2.12 MOSFETs QH1 and QL1
        13. 8.2.2.13 MOSFETs QH2 and QL2
        14. 8.2.2.14 Frequency Compensation
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
      2. 11.1.2 Development Support
        1. 11.1.2.1 Custom Design with WEBENCH Tools
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Support Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.3.13 Gm Error Amplifier

The LM34936 has a gm error amplifier for loop compensation. The gm amplifier output (COMP) range is 0.3 V to 3 V. Connect an Rc1-Cc1 compensation network between COMP and ground for type II (PI) compensation (see Figure 8-1). Another pole is usually added using Cc2 to suppress higher frequency noise and switching frequency ripple.

The COMP output voltage (VCOMP) range limits the possible VIN and IOUT range for a given design. In buck mode, the maximum VIN for which the converter can regulate the output at no load is when VCOMP reaches 0.3 V. Equation 7 gives VCOMP as a function of VIN at no load in CCM buck mode:

Equation 7. GUID-721637D2-2D1C-45DD-A52C-5222545F26FE-low.gif

Where DBUCK in the equation Equation 7 is the buck duty cycle given by:

Equation 8. GUID-7029248B-7F0C-4507-97C5-9C476063B26D-low.gif

A larger L1, lower slope ripple (higher CSLOPE), smaller sense resistor (RSENSE), and higher frequency can increase the maximum VIN range for buck operation.

For boost mode, the minimum VIN for which the converter can regulate the output at full load is when VCOMP reaches 3 V. Equation 9 gives VCOMP as a function of VIN in boost mode:

Equation 9. GUID-BE5ED288-35C5-4BE8-9901-557264561033-low.gif

Where DBOOST in the Equation 9 is the boost duty cycle given by:

Equation 10. GUID-9CDB7AD0-E9E6-4CF5-B84A-C57EB02CB47B-low.gif

A larger L1, lower slope ripple (higher CSLOPE), smaller sense resistor (RSENSE), and higher frequency can extend the minimum VIN range for boost operation.