BOOST |
IMATCH(1) |
LED current matching ILED1 to ILED2 |
50 µA ≤ ILED ≤ 25 mA, 2.7 V ≤ VIN ≤ 5 V (linear or exponential mode) |
–1% |
0.1% |
1% |
|
Accuracy |
Absolute accuracy (ILED1, ILED2) |
50 µA ≤ ILED ≤ 25 mA, 2.7 V ≤ VIN ≤ 5 V (linear or exponential mode) |
–3% |
0.1% |
3% |
|
ILED_MIN |
Minimum LED current (per string) |
PWM or I2C current control (linear or exponential mode) |
|
50 |
|
µA |
ILED_MAX |
Maximum LED current (per string) |
|
25 |
|
mA |
RDNL |
IDAC ratio-metric DNL |
exponential mode only |
|
1/3 (0.3%) |
|
LSB |
VHR |
Regulated current sink headroom voltage |
ILED = 25 mA |
|
210 |
|
mV |
ILED = 5 mA |
|
100 |
|
VHR_MIN |
Current sink minimum headroom voltage |
ILED = 95% of nominal, ILED = 5 mA |
|
35 |
50 |
mV |
Efficiency |
Typical efficiency |
VIN = 3.7 V, ILED = 5 mA/string, typical application circuit (2x8 LEDs), POUT/PIN) |
|
86% |
|
|
RNMOS |
NMOS switch on resistance |
ISW = 250 mA |
|
0.29 |
|
Ω |
ICL |
NMOS switch current limit |
2.7 V ≤ VIN ≤ 5 V |
OCP = 00 |
575 |
750 |
875 |
mA |
OCP = 01 |
860 |
1000 |
1110 |
OCP = 10 |
1100 |
1250 |
1400 |
OCP = 11 |
1350 |
1500 |
1650 |
VOVP |
Output overvoltage protection |
ON threshold, 2.7 V ≤ VIN ≤ 5 V |
OVP = 00 |
16 |
17 |
17.5 |
V |
OVP = 01 |
23 |
24 |
25 |
OVP = 10 |
30 |
31 |
32 |
OVP = 11 |
37 |
38 |
39 |
OVP Hysteresis |
|
|
|
|
0.5 |
|
V |
ƒSW |
Switching frequency |
2.7 V ≤ VIN ≤ 5 V, boost frequency shift = 0 |
Boost frequency select = 0 |
475 |
500 |
525 |
kHz |
Boost frequency select = 1 |
950 |
1000 |
1050 |
DMAX |
Maximum boost duty cycle |
|
92% |
94% |
|
|
ISHDN |
Shutdown current |
Chip enable bit = 0, SDA = SCL = IN or GND, 2.7 V ≤ VIN ≤ 5 V |
|
1.2 |
5 |
µA |
TSD |
Thermal shutdown |
|
|
135 |
|
°C |
Hysteresis |
|
|
15 |
|
PWM INPUT |
Min ƒPWM |
|
|
|
|
50 |
Hz |
Max ƒPWM |
|
Sample rate = 24 MHz |
|
50 |
|
|
kHz |
tMIN_ON |
Minimum pulse ON time |
Sample rate = 24 MHz |
|
|
|
183.3 |
ns |
Sample rate = 4 MHz |
|
|
|
1100 |
Sample rate = 800 kHz |
|
|
|
5500 |
tMIN_OFF |
Minimum pulse OFF time |
Sample rate = 24 MHz |
|
|
|
183.3 |
ns |
Sample rate = 4 MHz |
|
|
|
1100 |
Sample rate = 800 kHz |
|
|
|
5500 |
tSTART-UP |
Turnon delay from shutdown to backlight on |
PWM input active, PWM = logic high,HWEN input from low to high, ƒPWM = 10 kHz (50% duty cycle) |
|
3.5 |
5 |
ms |
PWMRES |
PWM input resolution |
1.6 kHz ≤ ƒPWM ≤ 12 kHz, PWM hysteresis = 00, PWM sample rate = 11 |
|
|
11 |
bits |
VIH |
Input logic high |
HWEN, ASEL, SCL, SDA, PWM inputs |
1.25 |
|
VIN |
V |
VIL |
Input logic low |
HWEN, ASEL, SCL, SDA, PWM inputs |
0 |
|
0.4 |
tGLITCH |
PWM input glitch rejection |
PWM pulse filter = 00 |
|
|
0 |
15 |
ns |
PWM pulse filter = 01 |
|
60 |
100 |
140 |
PWM pulse filter = 10 |
|
90 |
150 |
210 |
PWM pulse filter = 11 |
|
120 |
200 |
280 |
tPWM_STBY |
PWM shutdown period |
Sample rate = 24 MHz |
|
0.54 |
0.6 |
0.66 |
ms |
Sample rate = 4 MHz |
|
2.7 |
3 |
3.3 |
Sample rate = 800 kHz |
|
22.5 |
25 |
27.5 |