SNOSCS2D November 2013 – March 2019 LM3697
PRODUCTION DATA.
Refer to the PDF data sheet for device specific package drawings
Table 25 illustrates the minimum number of register writes required for a two-parallel, seven-series LED configuration. This example uses the default settings for ramp times (2048 µsec), mapping mode (exponential) and full-scale current (20.2 mA). In this mode of operation the LM3697 controls the brightness LSB's to ramp between the 8-bit MSB brightness levels providing 11-bit dimming while requiring only 8-bit commands from the host controller.
REGISTER NAME | ADDRESS | DATA | DESCRIPTION | |
---|---|---|---|---|
HVLED Current Sink Output Configuration | 0x10 | 0x04 | HVLED1 & 2 assigned to Control Bank A | |
HVLED Current Sink Feedback Enables | 0x19 | 0x03 | Enable feedback on HVLED1 & 2, disable feedback on HVLED3 | |
Boost Control | 0x1A | 0x04 | OVP = 32V, ƒsw = 500 kHz | |
Control Bank Enables | 0x24 | 0x01 | Enable Control Bank A | |
Control A Brightness LSB | 0x20 | 0x00 | Control A Brightness LSB written only once | |
Control A Brightness MSB | 0x21 | User Value | Control A Brightness MSB updated as required |
Table 26 shows the minimum number of register writes required for a two-parallel, six-series LED configuration with PWM Enabled. This example uses the default settings for ramp times (2048 µsec), mapping mode (exponential) and full-scale current (20.2 mA). In this mode of operation the host controller must update both the brightness LSB and MSB registers whenever a brightness change is required.
REGISTER NAME | ADDRESS | DATA | DESCRIPTION | |
---|---|---|---|---|
HVLED Current Sink Output Configuration | 0x10 | 0x04 | HVLED1 & 2 assigned to Control Bank A | |
HVLED Current Sink Feedback Enables | 0x19 | 0x03 | Enable feedback on HVLED1 & 2, disable feedback on HVLED3 | |
Boost Control | 0x1A | 0x02 | OVP = 24 V, ƒsw = 500 kHz | |
PWM Configuration | 0x1C | 0x0D | PWM Zero Detect = Enabled, PWM Polarity = Active HIgh, Control B PWM = Disabled, Control A PWM = Enabled | |
Control Bank Enables | 0x24 | 0x01 | Enable Control Bank A | |
Control A Brightness LSB | 0x20 | User Value | Control A Brightness LSB updated as required
(NOTE: The Brightness LSB change does not take effect until the Brightness MSB register is written.) |
|
Control A Brightness MSB | 0x21 | User Value | Control A Brightness MSB updated as required
(NOTE: Anytime the Brightness LSB is changed the Brightness MSB must be written for the Brightness LSB change to take effect.) |