SNVS821A January 2014 – March 2014 LM3699
PRODUCTION DATA.
MIN | MAX | UNIT | ||
---|---|---|---|---|
VIN to GND | −0.3V | 6 | V | |
VSW, VOVP, VHVLED1, VHVLED2, VHVLED3 to GND | −0.3V | 45 | ||
VIS1, VIS0, VILOW, VPWM to GND | −0.3V | 6 | ||
VHWEN to GND | −0.3V | 6 | ||
Continuous power dissipation | Internally Limited | |||
Maximum lead temperature (soldering) | 260 (peak) | °C | ||
Junction temperature (TJ-MAX) | 150 |
MIN | MAX | UNIT | ||
---|---|---|---|---|
Storage temperature range | −65 | 150 | °C | |
ESD Ratings(1) | Human body model (HBM)(2) | 2.0 | kV | |
Charged device model (CDM)(3) | 1500 | V |
MIN | MAX | UNIT | ||
---|---|---|---|---|
VIN to GND | 2.7 | 5.5 | V | |
VSW, VOVP, VHVLED1, VVHLED2, VVHLED3 to GND | 0 | 24 | ||
Junction temperature (TJ) (1)(2) | −40 | 125 | °C |
THERMAL METRIC(1) | DSBGA | UNIT | |
---|---|---|---|
(12 TERMINALS) | |||
RθJA | Junction-to-ambient thermal resistance | 55 | °C/W |
SYMBOL | PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT |
---|---|---|---|---|---|---|
General | ||||||
ISHDN | Shutdown current | 2.7 V ≤ VIN ≤ 5.5 V, HWEN = GND | 3.0 | µA | ||
2.7 V ≤ VIN ≤ 5.5 V, HWEN = GND, TA = 25°C |
1 | |||||
TSD | Thermal shutdown | 140 | °C | |||
Hysteresis | 15 | |||||
Boost Converter | ||||||
IHVLED(1/2/3) | Output current regulation (HVLED1, HVLED2, HVLED3) | 2.7 V ≤ VIN ≤ 5.5 V, ILOW = GND, IS0 = IS1 = VIN, PWM Duty Cycle = 100% |
18.38 | 22.02 | mA | |
2.7 V ≤ VIN ≤ 5.5 V, ILOW = GND, IS0 = IS1 = VIN, PWM Duty Cycle = 100% TA = 25°C |
20.2 | |||||
ILOW = GND, IS0 = IS1 = VIN, PWM Duty Cycle = 100% TA = 25°C |
18.7 | 21.58 | ||||
ILOW = GND, IS0 = IS1 = VIN, PWM Duty Cycle = 100%, TA = 25°C |
20.2 | |||||
3.0 V ≤ VIN ≤ 4.5 V, ILOW = GND, IS0 = IS1 = VIN, PWM Duty Cycle = 100% TA = 25°C |
18.63 | 21.58 | ||||
3.0 V ≤ VIN ≤ 4.5 V, ILOW = GND, IS0 = IS1 = VIN, PWM Duty Cycle = 100% TA = 25°C |
20.2 | |||||
IMATCH_HV | HVLED matching (HVLED1 to HVLED2 or HVLED2 to HVLED3 or HVLED1 to HVLED3) (3) |
2.7 V ≤ VIN ≤ 5.5 V, ILOW = GND, IS0 = IS1 = VIN, PWM Duty Cycle = 100% |
–2.5% | 2.5% | ||
ILOW = GND, IS0 = IS1 = VIN, PWM Duty Cycle = 100%, TA = 25°C |
–2% | 1.7% | ||||
3.0 V ≤ VIN ≤ 4.5 V, ILOW = GND, IS0 = IS1 = VIN, PWM Duty Cycle = 100% |
–2.5% | 2.5% | ||||
VREG_CS | Regulated current sink headroom voltage | ILOW = GND, IS0 = IS1 = VIN, PWM Duty Cycle = 100%, TA = 25°C |
400 | mV | ||
VHR_MIN | Minimum current sink headroom voltage for HVLED current sinks | ILED = 95% of nominal, ILOW = GND, IS0 = IS1 = VIN, PWM Duty Cycle = 100% | 275 | |||
ILED = 95% of nominal, ILOW = GND, IS0 = IS1 = VIN, PWM Duty Cycle = 100% TA = 25°C |
190 | |||||
RDSON | NMOS switch on resistance | ISW = 500 mA, TA = 25°C | 0.3 | Ω | ||
ICL_BOOST | NMOS Switch Current Limit | 880 | 1120 | mA | ||
TA = 25°C | 1000 | |||||
VOVP | Output overvoltage protection | ON threshold, 2.7 V ≤ VIN ≤ 5.5 V | 23 | 25 | V | |
ON threshold, TA = 25°C | 24 | |||||
Hysteresis, TA = 25°C | 0.7 | |||||
fSW | Switching frequency | 2.7 V ≤ VIN ≤ 5.5 V | 900 | 1100 | kHz | |
TA = 25°C | 1000 | |||||
DMAX | Maximum duty cycle | TA = 25°C | 94% | |||
HWEN Input | ||||||
VHWEN | Input logic low | 2.7 V ≤ VIN ≤ 5.5 V | 0 | 0.4 | V | |
Input logic high | 2.7 V ≤ VIN ≤ 5.5 V | 1.2 | VIN | |||
PWM Input | ||||||
VPWM_L | Input logic low | 2.7 V ≤ VIN ≤ 5.5 V | 0 | 0.4 | V | |
VPWM_H | Input logic high | 2.7 V ≤ VIN ≤ 5.5 V | 1.31 | VIN | ||
tPWM | Minimum PWM input pulse detected | 2.7 V ≤ VIN ≤ 5.5 V | 0.75 | µs | ||
IS1, IS0, ILOW Inputs | ||||||
VIL | Input logic low | 2.7 V ≤ VIN ≤ 5.5 V | 0 | 0.4 | V | |
VIH | Input logic high | 2.7 V ≤ VIN ≤ 5.5 V | 1.29 | VIN | ||
Internal POR Threshold | ||||||
VPOR | POR reset release voltage threshold | VIN ramp time = 100 μs | 1.7 | 2.1 | V | |
VIN ramp time = 100 μs TA = 25°C |
1.9 |