SNVS484H January   2007  – July 2015 LM5001 , LM5001-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 High-Voltage VCC Regulator
      2. 7.3.2 Oscillator
      3. 7.3.3 External Synchronization
      4. 7.3.4 Enable / Standby
      5. 7.3.5 Error Amplifier and PWM Comparator
      6. 7.3.6 Current Amplifier and Slope Compensation
      7. 7.3.7 Thermal Protection
      8. 7.3.8 Power MOSFET
  8. 8 Applications and Implementation
    1. 8.1 Application Information
      1. 8.1.1 VIN
      2. 8.1.2 SW Pin
      3. 8.1.3 EN / UVLO Voltage Divider Selection
      4. 8.1.4 Soft-Start
    2. 8.2 Typical Applications
      1. 8.2.1 Non-Isolated Flyback
      2. 8.2.2 Isolated Flyback
      3. 8.2.3 Boost
      4. 8.2.4 24-V SEPIC
      5. 8.2.5 12-V Automotive SEPIC
  9. 9 Layout
    1. 9.1 Layout Guidelines
  10. 10Device and Documentation Support
    1. 10.1 Related Links
    2. 10.2 Trademarks
    3. 10.3 Electrostatic Discharge Caution
    4. 10.4 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Pin Configuration and Functions

SOIC (D) 8 Pins
Top View
LM5001 LM5001-Q1 20215702.gif
WSON (NGT) 8 Pins
Top View
LM5001 LM5001-Q1 20215703.gif

Pin Functions

PIN NAME TYPE DESCRIPTION
SOIC WSON
1 3 SW Switch pin The drain terminal of the internal power MOSFET.
2 4 VIN Input supply pin Nominal operating range: 3.1 V to 75 V.
3 5 VCC Bias regulator output, or input for external bias supply VCC tracks VIN up to 6.9 V. Above VIN = 6.9 V, VCC is regulated to 6.9 V. A 0.47-µF or greater ceramic decoupling capacitor is required. An external voltage (7 V – 12 V) can be applied to this pin which disables the internal VCC regulator to reduce internal power dissipation and improve converter efficiency.
4 6 GND Ground Internal reference for the regulator control functions and the power MOSFET current sense resistor connection.
5 7 RT Oscillator frequency programming and optional synchronization pulse input The internal oscillator is set with a resistor, between this pin and the GND pin. The recommended frequency range is 50 KHz to 1.5 MHz. The RT pin can accept synchronization pulses from an external clock. A 100-pF capacitor is recommended for coupling the synchronizing clock to the RT pin.
6 8 FB Feedback input from the regulated output voltage This pin is connected to the inverting input of the internal error amplifier. The 1.26-V reference is internally connected to the non-inverting input of the error amplifier.
7 1 COMP Open drain output of the internal error amplifier The loop compensation network should be connected between the COMP pin and the FB pin. COMP pull-up is provided by an internal 5-kΩ resistor which may be used to bias an opto-coupler transistor (while FB is grounded) for isolated ground applications.
8 2 EN Enable / Undervoltage Lock-Out / Shutdown input An external voltage divider can be used to set the line undervoltage lockout threshold. If the EN pin is left unconnected, a 6-µA pull-up current source pulls the EN pin high to enable the regulator.
NA EP EP Exposed Pad, WSON only Exposed metal pad on the underside of the package with a resistive connection to pin 6. It is recommended to connect this pad to the PC board ground plane in order to improve heat dissipation.