The LM5002 employs peak current-mode control that also provides a cycle-by-cycle overcurrent protection feature. An internal 100-mΩ current sense resistor measures the current in the power MOSFET source. The sense resistor voltage is amplified 30 times to provide a 3 V/A signal into the current limit comparator. Current limiting is initiated if the internal current limit comparator input exceeds the 1.5-V threshold, corresponding to
0.5 A. When the current limit comparator is triggered, the SW output pin immediately switches to a high impedance state.

The current sense signal is reduced to a scale factor of 2.1 V/A for the PWM comparator signal. The signal is then summed with a 450-mV peak slope compensation ramp. The combined signal provides the PWM comparator with a control signal that reaches 1.5 V when the MOSFET current is 0.5 A. For duty cycles greater than 50%, current mode control circuits are subject to subharmonic oscillation (alternating between short and long PWM pulses every other cycle). Adding a fixed slope voltage ramp signal (slope compensation) to the current sense signal prevents this oscillation. The 450-mV ramp (zero volts when the power MOSFET turns on, and 450 mV at the end of the PWM clock cycle) adds a fixed slope to the current sense ramp to prevent oscillation.

To prevent erratic operation at low duty cycle, a leading edge blanking circuit attenuates the current sense signal when the power MOSFET is turned on. When the MOSFET is initially turned on, current spikes from the power MOSFET drain-source and gate-source capacitances flow through the current sense resistor. These transient currents normally cease within 50 ns with proper selection of rectifier diodes and proper PCB layout.