8.2.2.1 Frequency Set Resistor (R_T)

Resistor R_T sets the switching frequency. Generally, higher frequency applications are smaller but have higher losses. A switching frequency of 300 kHz is selected in this example as a reasonable compromise for small solution size and high efficiency. Calculate the resistance of R_T for a 300-kHz switching frequency with Equation 9.

Equation 9.

Choose the nearest standard resistor value of 20.5 kΩ for R_T.

8.2.2.2 Inductor (L_F)

The inductance is determined based on the switching frequency, load current, inductor ripple current, and the minimum and maximum input voltages designated V_IN(min) and V_IN(max), respectively.

Figure 18. Inductor Current Waveform

To keep the converter operating in CCM, the maximum inductor ripple current ΔI_L must be less than twice the minimum load current, or 0.5-A peak-to-peak. Using this value of ripple current, calculate the inductance using Equation 10.

Equation 10.

Use the nearest standard value of 33 µH. An alternative method is to choose an inductance that gives an inductor ripple current of 30% to 50% of the rated full load current at the nominal input voltage.

Note that the inductor must be rated for the peak inductor current, denoted as I_PEAK in Figure 18, to prevent saturation. During normal loading conditions, the peak inductor current corresponds to maximum load current plus half the maximum peak-to-peak ripple current. The peak inductor current during an overload condition is limited to 3.5 A nominal (4.25 A maximum). The selected inductor in this design example (see Table 1) has a conservative 6.2-A saturation current rating. The saturation current is defined by this inductor manufacturer as the current required for the inductance to reduce by 30% at 20°C.

8.2.2.3 Ramp Capacitor (C_RAMP)

With the inductor selected, calculate the value of C_RAMP necessary for the emulation ramp circuit using Equation 11.

Equation 11.

With L_F selected as 33 µH, the recommended C_RAMP is 330 pF. Use a capacitor with NP0 or C0G dielectric.

8.2.2.4 Output Capacitors (C_OUT)

The output capacitor filters the inductor ripple current and provides a source of charge for transient load conditions. A wide range of output capacitors may be used with the LM5005 that provide various advantages. The best performance is typically obtained using ceramic or polymer electrolytic type components. Typical trade-offs are that the ceramic capacitor provides extremely low ESR to reduce the output ripple voltage and noise spikes, while electrolytic capacitors provide a large bulk capacitance in a small volume for transient loading conditions.

When selecting an output capacitor, the two performance characteristics to consider are the output voltage ripple and load transient response. Approximate the output voltage ripple with Equation 12.

Equation 12.

where

• ΔV_OUT is the peak-to-peak output voltage ripple
• R_ESR is the effective series resistance (ESR) of the output capacitor
• F_SW is the switching frequency
• C_OUT is the effective output capacitance

The amount of output voltage ripple is application specific. A general recommendation is to keep the output ripple less than 1% of the rated output voltage.

Bear in mind that ceramic capacitors are sometimes preferred because they have low ESR. However, depending on package and voltage rating of the capacitor, the effective in-circuit capacitance can drop significantly with applied voltage. The output capacitor selection also affects the output voltage droop during a load transient. The peak deviation of the output voltage during a load transient is dependent on many factors. An approximation of the transient dip ignoring loop bandwidth is obtained using Equation 13:

Equation 13.

where

• C_OUT is the minimum required output capacitance
• L_F is the buck filter inductance
• V_DROOP is the output voltage deviation ignoring loop bandwidth considerations
• ΔI_OUT-STEP is the load step change
• R_ESR is the output capacitor ESR
• V_IN is the input voltage
• V_OUT is the output voltage setpoint

A 22-µF, 16-V ceramic capacitor with X7R dielectric and 1210 footprint and a 150-µF, 6.3-V polymer electrolytic capacitor are selected here based on a review of each capacitor's tolerance and voltage coefficient to meet output ripple specification. The ceramic capacitor provides ultra-low ESR to reduce the output ripple voltage and noise spikes, while the electrolytic capacitor provides a large bulk capacitance in a small volume for transient loading conditions.

8.2.2.5 Schottky Diode (D_F)

A Schottky type freewheeling diode is required for all LM5005 applications. Select the diode's reverse breakdown rating for the maximum V_IN plus some safety margin. Ultra-fast diodes are not recommended and may result in damage to the regulator due to reverse recovery current transients. The near ideal reverse recovery characteristics and low forward voltage drop of a Schottky diode are particularly important diode characteristics for high input voltage and low output voltage applications common to the LM5005.

The reverse recovery characteristic determines how long the current surge lasts each cycle when the buck switch is turned on. The benign reverse recovery characteristics of a Schottky diode minimizes the peak instantaneous power in the buck switch occurring during turnon each cycle, and the resulting switching losses of the buck switch are significantly reduced.

The diode's forward voltage drop has a significant impact on the conversion efficiency, especially for applications with a low output voltage. Rated current for diodes vary widely from various manufactures. The worst case is to assume a short-circuit load condition. In this case the diode conducts the output current almost continuously. For the LM5005 this current can be as high as 3.5 A. Assuming a worst-case 1-V drop across the diode, the maximum diode power dissipation can be as high as 3.5 W. For this design example, a 100-V, 6-A Schottky in a DPAK package is selected.

8.2.2.6 Input Capacitors (C_IN)

The regulator supply voltage has a large source impedance at the switching frequency. Good quality input capacitors are necessary to limit the ripple voltage at the VIN pin while supplying most of the switch current during the on-time. When the buck switch turns on, the current into the VIN pins steps to the lower peak of the inductor current waveform, ramps up to the peak value, then drops to zero at turnoff. The average current into VIN during the on-time is the load current. The input capacitance must be selected for RMS current rating and minimum ripple voltage. A good approximation for the required ripple current rating necessary is I_RMS > I_OUT / 2.

Select ceramic capacitors with a low ESR for the input filter. To allow for capacitor tolerances and voltage derating effects, two 2.2-µF, 100-V ceramic capacitors are used. If step input voltage transients are expected near the maximum rating of the LM5005, a careful evaluation of ringing and possible spikes at the VIN pin id required. An additional damping network, snubber circuit or input voltage clamp may be required in these cases.

8.2.2.7 VCC Capacitor (C_VCC)

The capacitor at the VCC pin provides noise filtering and stability for the VCC regulator. The recommended value of C_VCC is 0.47 µF and must be a low-ESR ceramic capacitor of X7R dielectric rated for at least 16 V.

8.2.2.8 Bootstrap Capacitor (C_BST)

The bootstrap capacitor connected between the BST and SW pins supplies the gate current to charge the buck switch gate at turnon. The recommended value of C_BST is 22 nF. Choose a low ESR ceramic capacitor with X7R dielectric rated for at least 16 V.

8.2.2.9 Soft Start Capacitor (C_SS)

The capacitor connected to the SS pin determines the soft-start time, or the time for the reference voltage and the output voltage to reach their final regulated values. If t_SS is the required soft-start time, calculate the soft-start capacitance using Equation 14 or more simply with Equation 15.

Equation 14.

Equation 15.

Choose a C_SS of 10 nF corresponding to a soft-start time of 1.2 ms for this application.

8.2.2.10 Feedback Resistors (R_FB1 and R_FB2)

Resistors R_FB1 and R_FB2 establish the output voltage setpoint. Based on a selected value for the lower feedback resistor R_FB2, calculate the upper feedback resistor R_FB1 from Equation 16.

Equation 16.

In general, a good starting point for R_FB2 is in the range of 1 kΩ to 10 kΩ. Resistances of 5.11 kΩ and 1.65 kΩ are selected for R_FB1 and R_FB2 (respectively) to achieve a 5-V output setpoint for this design example.

8.2.2.11 RC Snubber (R_S and C_S)

A snubber network across the power diode reduces ringing and spikes at the switching node. Excessive ringing and spikes can cause erratic operation and couple spikes and noise to the output. Ultimately, excessive spikes beyond the rating of the LM5005 or the freewheeling diode can damage these devices. Selecting the values for the snubber is best accomplished through empirical methods. First, make sure the lead lengths for the snubber connections are short. For the current levels typical of the LM5005 converter, a snubber resistance R_S between
2 Ω and 10 Ω is adequate. Increasing the value of the snubber capacitor results in more damping but higher losses. Select a minimum value of C_S that provides adequate damping of the SW voltage waveform at full load (see PCB Layout for EMI Reduction for more details).

8.2.2.12 Compensation Components (R_C1, C_C1, C_C2)

These components configure the error amplifier gain characteristics to accomplish a stable overall loop gain. One advantage of current-mode control is the ability to close the loop with only two feedback components, R_C1 and C_C1. The overall loop gain is the product of the modulator gain and the error amplifier gain. The DC modulator gain of the LM5005 is calculated with Equation 17.

Equation 17.

The dominant low-frequency pole of the modulator is determined by the load resistance, R_LOAD, and the output capacitance, C_OUT. Calculate the corner frequency of this pole with Equation 18.

Equation 18.

For R_LOAD = 5 Ω and C_OUT = 177 µF, then f_p(MOD) = 180 Hz

GAIN_MOD-DC = 2 A/V × 5 Ω = 10 = 20 dB

For this design example given R_LOAD = 5 Ω and C_OUT = 177 µF, Figure 19 shows the experimentally measured modulator gain versus frequency characteristic.

Figure 19. PWM Modulator Gain and Phase Plot

Components R_C1 and C_C1 configure the error amplifier as a Type-II configuration, giving a pole at the origin and a zero at f_Z = 1 / (2π R_C1 C_C1). The error amplifier zero cancels the modulator pole leaving a single pole response at the crossover frequency of the loop gain. A single pole response at the crossover frequency yields a stable loop with 90° of phase margin.

For the design example, select a target loop bandwidth (crossover frequency) of 20 kHz. Place the compensator zero frequency, f_Z, an order of magnitude less than the target crossover frequency. This constrains the product of R_C1 and C_C1 for a desired compensation network zero frequency to be less than 2 kHz. Increasing R_C1 while proportionally decreasing C_C1 increases the error amp gain. Conversely, decreasing R_C1 while proportionally increasing C_C1, decreases the error amp gain. Select R_C1 of 49.9 kΩ and C_C1 of 10 nF. These values configure the compensation network zero at 320 Hz. The compensator gain at frequencies greater than f_Z is R_C1 / R_FB1, which is approximately 20 dB.

The compensator's bode plot is shown by Figure 20. The overall loop is predicted as the sum (in dB) of the modulator gain and the compensator gain as shown in Figure 21.

Figure 20. Compensator Gain and Phase Plot

Figure 21. Overall Loop Gain and Phase Plot

If a network analyzer is available, measure the modulator gain and configure the compensator gain for the desired loop transfer function. If a network analyzer is not available, design the error amplifier's compensation components using the guidelines provided. Perform step-load transient tests to verify acceptable performance. The step load goal is minimum overshoot with a damped response. Add a capacitor C_C2 to the compensation network to decrease noise susceptibility of the error amplifier. The value of C_C2 must be sufficiently small, because the addition of this capacitor adds a pole in the compensator transfer function. This pole must be well beyond the loop crossover frequency. A good approximation of the location of the pole added by C_C2 is Equation 19.

An alternative method to decrease the error amplifier noise susceptibility is to connect a capacitor from COMP to AGND. When using this method, the capacitance of C_C2 must not exceed 100 pF.

8.2.2.13 Bill of Materials

Table 1 lists the bill of materials for the design example.