The LM5010 step-down switching regulator features all the functions needed to implement a low-cost, efficient, buck bias regulator capable of supplying in excess of 1-A load current. This high-voltage regulator contains an N-Channel Buck Switch, and is available in thermally enhanced 10-pin WSON and 14-pin HTSSOP packages. The hysteretic regulation scheme requires no loop compensation, resulting in fast load transient response, and simplifies circuit implementation. The operating frequency remains constant with line and load variations due to the inverse relationship between the input voltage and the ON-time. The valley current limit detection is set at 1.25 A. Additional features include: VCC undervoltage lockout, thermal shutdown, gate drive undervoltage lockout, and maximum duty cycle limiter.
PART NUMBER | PACKAGE | BODY SIZE (NOM) |
---|---|---|
LM5010 | WSON (10) | 4.00 mm × 4.00 mm |
HTSSOP (14) | 4.40 mm × 5.00 mm |
Changes from F Revision (February 2013) to G Revision
Changes from E Revision (February 2013) to F Revision
PIN | I/O | DESCRIPTION | ||
---|---|---|---|---|
NAME | WSON | HTSSOP | ||
BST | 2 | 3 | I | Boost pin for bootstrap capacitor: Connect a 0.022-µF capacitor from SW to this pin. The capacitor is charged from VCC through an internal diode during each OFF-time. |
EP | — | — | — | Exposed pad |
FB | 6 | 9 | I | Feedback input from the regulated output: Internally connected to the regulation and overvoltage comparators. The regulation level is 2.5 V. |
ISEN | 3 | 4 | I | Current sense: The recirculating current flows through the internal sense resistor, and out of this pin to the free-wheeling diode. Current limit is nominally set at 1.25 A. |
NC | — | 1, 7, 8, 14 | — | No connection |
RON/SD | 8 | 11 | I | ON-time control and shutdown: An external resistor from VIN to this pin sets the buck switch ON-time. Grounding this pin shuts down the regulator. |
RTN | 5 | 6 | — | Circuit ground: Ground for all internal circuitry other than the current limit detection. |
SGND | 4 | 5 | — | Sense ground: Recirculating current flows into this pin to the current sense resistor. |
SS | 7 | 10 | I | Soft start: An internal 11.5-µA current source charges an external capacitor to 2.5 V, providing the soft start function. |
SW | 1 | 2 | O | Switching node: Internally connected to the buck switch source. Connect to the inductor, free-wheeling diode, and bootstrap capacitor. |
VCC | 9 | 12 | I | Output from the startup regulator: Nominally regulates at 7 V. An external voltage (7.5 V to 14 V) can be applied to this pin to reduce internal dissipation. An internal diode connects VCC to VIN. |
VIN | 10 | 13 | I | Input supply: Nominal input range is 8 V to 75 V. |
MIN | MAX | UNIT | |
---|---|---|---|
VIN | 8 | 75 | V |
VIN to GND | 76 | V | |
BST to GND | 90 | V | |
SW to GND (steady state) | –1.5 | V | |
BST to VCC | 76 | V | |
BST to SW | 14 | V | |
VCC to GND | 14 | V | |
SGND to RTN | –0.3 | 0.3 | V |
SS to RTN | –0.3 | 4 | V |
VIN to SW | 76 | V | |
All other inputs to GND | –0.3 | 7 | V |
Lead temperature (soldering, 4 s)(2) | 260 | °C | |
Junction temperature, TJ | –40 | 150 | °C |
Storage temperature, Tstg | –55 | 150 | °C |
VALUE | UNIT | |||
---|---|---|---|---|
V(ESD) | Electrostatic discharge | Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) | ±2000 | V |
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) | ±750 |
MIN | MAX | UNIT | ||
---|---|---|---|---|
VIN | Input voltage | 8 | 75 | V |
IO | Output current | 1 | A | |
Ext-VCC | External bias voltage | 8 | 13 | V |
TJ | Operating junction temperature | –40 | 125 | °C |
THERMAL METRIC(1) | LM5010 | UNIT | ||
---|---|---|---|---|
DPR (WSON) | PWP (HTSSOP) | |||
10 PINS | 14 PINS | |||
RθJA | Junction-to-ambient thermal resistance | 36 | 41.1 | °C/W |
RθJC(top) | Junction-to-case (top) thermal resistance | 31.9 | 26.5 | °C/W |
RθJB | Junction-to-board thermal resistance | 13.2 | 22.5 | °C/W |
ψJT | Junction-to-top characterization parameter | 0.3 | 0.7 | °C/W |
ψJB | Junction-to-board characterization parameter | 13.5 | 22.2 | °C/W |
RθJC(bot) | Junction-to-case (bottom) thermal resistance | 3 | 3.3 | °C/W |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
VCC REGULATOR | ||||||
VCCReg | VCC regulated output | 6.6 | 7 | 7.4 | V | |
VIN - VCC | ICC = 0 mA, FS < 200 kHz, 7.5 V ≤ VIN ≤ 8 V |
1.3 | V | |||
VCC output impedance (0 mA ≤ ICC ≤ 5 mA) | VIN = 8 V | 140 | Ω | |||
VIN = 48 V | 2.5 | |||||
VCC current limit | VCC = 0 V | 10 | mA | |||
UVLOVCC | VCC undervoltage lockout threshold | VCC increasing | 5.8 | V | ||
UVLOVCC hysteresis | VCC decreasing | 145 | mV | |||
UVLOVCC filter delay | 100-mV overdrive | 3 | µs | |||
IIN operating current | Non-switching, FB = 3 V | 650 | 850 | µA | ||
IIN shutdown current | RON/SD = 0 V | 95 | 200 | µA | ||
SOFT-START PIN | ||||||
Pullup voltage | 2.5 | V | ||||
Internal current source | 11.5 | µA | ||||
CURRENT LIMIT | ||||||
ILIM | Threshold | Current out of ISEN | 1 | 1.25 | 1.5 | A |
Resistance from ISEN to SGND | 130 | mΩ | ||||
Response time | 150 | ns | ||||
RON/SD PIN | ||||||
Shutdown threshold | Voltage at RON/SD rising | 0.35 | 0.65 | 1.1 | V | |
Threshold hysteresis | Voltage at RON/SD falling | 40 | mV | |||
HIGH-SIDE FET | ||||||
RDS(ON) | Buck switch | ITEST = 200 mA | 0.35 | 0.8 | Ω | |
UVLOGD | Gate drive UVLO | VBST - VSW Increasing | 3 | 4.3 | 5 | V |
UVLOGD Hysteresis | 440 | mV | ||||
REGULATION AND OVERVOLTAGE COMPARATORS (FB PIN) | ||||||
VREF | FB regulation threshold | SS pin = steady state | 2.45 | 2.5 | 2.55 | V |
FB overvoltage threshold | 2.9 | V | ||||
FB bias current | 1 | nA | ||||
THERMAL SHUTDOWN | ||||||
TSD | Thermal shutdown temperature | 175 | °C | |||
Thermal shutdown hysteresis | 20 | °C |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
RDS(ON) | Buck switch | ITEST = 200 mA | 0.35 | 0.8 | Ω | |
UVLOGD | Gate drive UVLO | VBST - VSW Increasing | 3 | 4.3 | 5 | V |
UVLOGD Hysteresis | 440 | mV | ||||
OFF TIMER | ||||||
tOFF | Minimum OFF-time | 265 | ns | |||
ON TIMER | ||||||
tON - 1 | ON-time | VIN = 10 V, RON = 200 kΩ | 2.1 | 2.75 | 3.4 | µs |
tON - 2 | ON-time | VIN = 75 V, RON = 200 kΩ | 290 | 390 | 490 | ns |
The LM5010 step-down switching regulator features all the functions needed to implement a low-cost, efficient, buck bias power converter. This high-voltage regulator contains a 75-V N-channel buck switch, is easy to implement, and is provided in HTSSOP and thermally-enhanced, WSON packages. The regulator is based on a control scheme using an ON-time inversely proportional to VIN. The control scheme requires no loop compensation. The functional block diagram of the LM5010 is shown in the Functional Block Diagram.
The LM5010 can be applied in numerous applications to efficiently regulate down higher voltages. This regulator is well-suited for 48-V telecom and 42-V automotive power bus ranges. Additional features include: thermal shutdown, VCC undervoltage lockout, gate drive undervoltage lockout, maximum duty cycle limit timer, and the valley current limit functionality.
The LM5010 step-down switching regulator features all the functions needed to implement a low-cost, efficient buck bias power converter capable of supplying in excess of 1 A to the load. This high voltage regulator contains an N-Channel buck switch, is easy to implement, and is available in the thermally enhanced 10-pin WSON and 14-pin HTSSOP packages. The regulator’s operation is based on a constant ON-time control scheme, where the ON-time varies inversely with VIN. This feature results in the operating frequency remaining relatively constant with load and input voltage variations. The switching frequency can range from 100 kHz to > 1 MHz. The hysteretic control requires no loop compensation, resulting in very fast load transient response. The valley current limit detection circuit, internally set at 1.25 A, holds the buck switch off until the high current level subsides. The LM5010 can be applied in numerous applications to efficiently regulate down higher voltages. This regulator is well suited for 48-V telecom applications, as well as the new 42-V automotive power bus. Implemented as a point-of-load regulator following a highly-efficient intermediate bus converter can result in high overall system efficiency. Features include: Thermal shutdown, VCC undervoltage lockout, gate drive undervoltage lockout, and maximum duty cycle limit.
The LM5010 buck DC-DC regulator employs a control scheme based on a comparator and a one-shot ON timer, with the output voltage feedback (FB) compared to an internal reference (2.5 V). If the FB voltage is below the reference the buck switch is turned on for a time period determined by the input voltage and a programming resistor (RON). Following the ON-time the switch remains off for 265 ns, or until the FB voltage falls below the reference, whichever is longer. The buck switch then turns on for another ON-time period. Typically when the load current increases suddenly, the OFF-times are temporarily at the minimum of 265 ns. Once regulation is established, the OFF-time resumes its normal value. The output voltage is set by two external resistors (R1, R2). The regulated output voltage is calculated with Equation 1.
Output voltage regulation is based on ripple voltage at the feedback input, requiring a minimum amount of ESR for the output capacitor C2. The LM5010 requires a minimum of 25-mV of ripple voltage at the FB pin. In cases where the capacitor’s ESR is insufficient, additional series resistance may be required (R3 in Functional Block Diagram).
When in regulation, the LM5010 operates in continuous conduction mode at heavy load currents and discontinuous conduction mode at light load currents. In continuous conduction mode current always flows through the inductor, never reaching zero during the OFF-time. In this mode the operating frequency remains relatively constant with load and line variations. The minimum load current for continuous conduction mode is one-half the inductor’s ripple current amplitude. Calculate the approximate operating frequency with Equation 2.
The buck switch duty cycle is approximately equal to Equation 3.
At low load current, the circuit operates in discontinuous conduction mode, during which the inductor current ramps up from zero to a peak during the ON-time, then ramps back to zero before the end of the OFF-time. The next ON-time period starts when the voltage at FB falls below the reference until then the inductor current remains zero, and the load current is supplied by the output capacitor (C2). In this mode the operating frequency is lower than in continuous conduction mode, and varies with load current. Conversion efficiency is maintained at light loads because the switching losses reduce with the reduction in load and frequency. Calculate the approximate discontinuous operating frequency with Equation 4.
where
For applications where lower output voltage ripple is required, the output can be taken directly from a low ESR output capacitor as shown in Figure 8. However, R3 slightly degrades the load regulation.
The start-up regulator is integral to the LM5010. The input pin (VIN) can be connected directly to line voltages up to 75 V. The VCC output is regulated at 7 V, ±6%, and is current-limited to 10 mA. Upon power up the regulator sources current into the external capacitor at VCC (C3). With a 0.1-µF capacitor at VCC, approximately 58 µs are required for the VCC voltage to reach the undervoltage lockout threshold (UVLO) of 5.8 V (t1 in Figure 7), at which time the buck switch is enabled, and the soft-start pin is released to allow the soft-start capacitor (C6) to charge up. VOUT then increases to its regulated value as the soft-start voltage increases (t2 in Figure 7).
The minimum input operating voltage is determined by the regulator’s dropout voltage, the VCC UVLO falling threshold (≊5.65 V), and the frequency. When VCC falls below the falling threshold the VCC UVLO activates to shut off the buck switch and ground the soft-start pin. If VCC is externally loaded, the minimum input voltage increases since the output impedance at VCC is ≊140 Ω at low VIN. See Figure 1 and Figure 2. In applications involving a high value for VIN where power dissipation in the start-up regulator is a concern, an auxiliary voltage can be diode connected to the VCC pin (Figure 9). Setting the auxiliary voltage to between 7.5 V and 14 V shuts off the internal regulator, reducing internal power dissipation. Figure 3 shows the current required into the VCC pin. A diode connects VCC to VIN internally.
The feedback voltage at FB is compared to the voltage at the soft-start pin (2.5 V, ±2%). In normal operation (the output voltage is regulated) an ON-time period is initiated when the voltage at FB falls below 2.5 V. The buck switch stays on for the ON-time causing the FB voltage to rise above 2.5 V. After the ON-time period the buck switch stays off until the FB voltage falls below 2.5 V. Bias current at the FB pin is less than 5 nA over temperature.
The feedback voltage at FB is compared to an internal 2.9-V reference. If the voltage at FB rises above 2.9 V, the ON-time is immediately terminated. This condition can occur if the input voltage or the output load changes suddenly. The buck switch will not turn on again until the voltage at FB falls below 2.5 V.
The ON-time of the internal switch (see Figure 4) is determined by the RON resistor and the input voltage (VIN), calculated with Equation 5.
The inverse relationship of tON vs VIN results in a nearly constant frequency as VIN is varied. If the application requires a high frequency, the minimum value for tON, and consequently RON, is limited by the OFF-time (265 ns, ±15%) which limits the maximum duty cycle at minimum VIN. The tolerance for Equation 5 is ±25%. Frequencies in excess of 1 MHz are possible with the LM5010.
Current limit detection occurs during the OFF-time by monitoring the recirculating current through the free-wheeling diode (D1). The detection threshold is 1.25 A, ±0.25 A. Referring to Functional Block Diagram, when the buck switch is off the inductor current flows through the load, into SGND, through the sense resistor, out of ISEN and through D1. If that current exceeds the threshold the current limit comparator output switches to delay the start of the next ON-time period. The next ON-time starts when the current out of ISEN is below the threshold and the voltage at FB is below 2.5 V. If the overload condition persists causing the inductor current to exceed the threshold during each ON-time, that is detected at the beginning of each OFF-time. The operating frequency is lower due to longer-than-normal OFF-times.
Figure 10 illustrates the inductor current waveform. During normal operation the load current is IO, the average of the ripple waveform. When the load resistance decreases the current ratchets up until the lower peak attempts to exceed the threshold. During the Current Limited portion of Figure 10, the current ramps down to the threshold during each OFF-time, initiating the next ON-time (assuming the voltage at FB is < 2.5 V). During each ON-time the current ramps up an amount equal to Equation 6.
During this time the LM5010 is in a constant current mode, with an average load current (IOCL) equal to the threshold + ΔI / 2.
The valley current limit technique allows the load current to exceed the current limit threshold as long as the lower peak of the inductor current is less than the threshold.
The current limit threshold can be increased by connecting an external resistor (RCL) between SGND and ISEN. The external resistor typically is less than 1 Ω, and its calculation is explained in Application and Implementation.
The peak current out of SW and ISEN must not exceed 3.5 A. The average current out of SW must be less than
3 A, and the average current out of ISEN must be less than 2 A.
The soft-start feature allows the converter to gradually reach a steady-state operating point, thereby reducing start-up stresses and current surges. Upon turnon, after VCC reaches the undervoltage threshold (t1 in Figure 7), an internal 11.5-µA current source charges the external capacitor at the soft-start pin to 2.5 V (t2 in Figure 7). The ramping voltage at SS (and at the non-inverting input of the regulation comparator) ramps up the output voltage in a controlled manner. This feature keeps the load current from going to current limit during start-up, thereby reducing inrush currents.
An internal switch grounds the soft-start pin if VCC is below the undervoltage lockout threshold, if a thermal shutdown occurs, or if the circuit is shutdown using the RON/SD pin.
The LM5010 integrates an N-Channel buck switch and associated floating high voltage gate driver. The peak current through the buck switch must not be allowed to exceed 3.5 A, and the average current must be less than 3 A. The gate driver circuit is powered by the external bootstrap capacitor between BST and SW (C4). During each OFF-time, the SW pin is at approximately –1 V, and C4 is recharged from VCC through the internal high voltage diode. The minimum OFF-time of 265 ns ensures a minimum time each cycle to recharge the bootstrap capacitor. TI recommends a 0.022-µF ceramic capacitor for C4.
The LM5010 should be operated so the junction temperature does not exceed 125°C. If the junction temperature increases above that, an internal Thermal Shutdown circuit activates (typically) at 175°C, taking the controller to a low-power reset state by disabling the buck switch and the ON timer, and grounding the soft-start pin. This feature helps prevent catastrophic failures from accidental device overheating. When the junction temperature reduces below 155°C (typical hysteresis = 20°C), the softstart pin is released and normal operation resumes.
The LM5010 can be remotely shut down by taking the RON/SD pin below 0.65 V. See Figure 11. In this mode the soft-start pin is internally grounded, the ON timer is disabled, and the input current at VIN is reduced (Figure 6). Releasing the RON/SD pin allows normal operation to resume. When the switch is open, the nominal voltage at RON/SD is shown in Figure 5.
NOTE
Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.
The LM5010 is a non-synchronous buck regulator converter designed to operate over a wide input voltage and output current range. Spreadsheet-based calculator tools, available on the TI product website at Quick-Start Calculator, can be used to design a single output non-synchronous buck converter.
Alternatively, online WEBENCH® software is available to create a complete buck design and generate the bill of materials, estimated efficiency, solution size, and cost of the complete solution.
The final circuit is shown in Figure 12, and its performance is shown from Figure 14 to Figure 17.
Table 1 lists the operating parameters for Figure 12.
PARAMETER | EXAMPLE VALUE |
---|---|
Input voltage | 15 V to 75 V |
Output voltage | 10 V |
Load current | 150 mA to 1 A |
Soft-start time | 5 ms |
The procedure for calculating the external components is illustrated with a design example. Configure the circuit in Figure 12 according to the components listed in Table 2.
COMPONENT | DESCRIPTION | VALUE |
---|---|---|
C1 | Ceramic Capacitor | 2.2 µF, 100 V |
C2 | Ceramic Capacitor | 15 µF, 25 V |
C3 | Ceramic Capacitor | 0.1 µF, 16 V |
C4, C6 | Ceramic Capacitor | 0.022 µF, 16 V |
C5 | Ceramic Capacitor | 0.1 µF, 100 V |
D1 | Ultra-fast diode | 100 V, 2 A |
L1 | Inductor | 100 µH |
R1 | Resistor | 3 kΩ |
R2 | Resistor | 1 kΩ |
R3 | Resistor | 2.8 Ω |
RON | Resistor | 137 kΩ |
U1 | Switching regulator | — |
Calculate the ratio of these resistors with Equation 7.
R1 and R2 calculates to 3. The resistors should be chosen from standard value resistors in the range of 1 kΩ to 10 kΩ. Values of 3 kΩ for R1, and 1 kΩ for R2 are used.
RON sets the ON-time, and can be chosen using Equation 2 to set a nominal frequency, or from Equation 5 if the ON-time at a particular VIN is important. A higher frequency generally means a smaller inductor and capacitors (value, size and cost), but higher switching losses. A lower frequency means a higher efficiency, but with larger components. If PC board space is tight, a higher frequency is better. The resulting ON-time and frequency have a ±25% tolerance, rearranging Equation 2 to Equation 8.
The next larger standard value (137 kΩ) is chosen for RON, yielding a nominal frequency of 618 kHz.
The inductor value is determined based on the load current, ripple current, and the minimum and maximum input voltage (VIN(min), VIN(max)). See Figure 13.
To keep the circuit in continuous conduction mode, the maximum allowed ripple current is twice the minimum load current, or 300 mAP-P. Using this value of ripple current, the inductor (L1) is calculated using Equation 9 and Equation 10.
where
Equation 10 provides the minimum value for inductor L1. When selecting an inductor, use a higher standard value (100 uH). L1 must be rated for the peak current (IPK+) to prevent saturation. The peak current occurs at maximum load current with maximum ripple. The maximum ripple is calculated by rearranging Equation 9 using VIN(max), FS(min), and the minimum inductor value, based on the manufacturer’s tolerance. Assume for Equation 11, Equation 12, and Equation 13 that the inductor’s tolerance is ±20%.
Since it is obvious that the lower peak of the inductor current waveform does not exceed 1 A at maximum load current (see Figure 13), it is not necessary to increase the current limit threshold. Therefore RCL is not needed for this exercise. For applications where the lower peak exceeds 1 A, see Increasing The Current Limit Threshold.
Since the LM5010 requires a minimum of 25 mVP-P of ripple at the FB pin for proper operation, the required ripple at VOUT1 is increased by R1 and R2. This necessary ripple is created by the inductor ripple current acting on C2’s ESR + R3. First, determine the minimum ripple current with Equation 14.
The minimum ESR for C2 is then equal to Equation 15.
If the capacitor used for C2 does not have sufficient ESR, R3 is added in series as shown in Figure 12. C2 should generally be no smaller than 3.3 µF, although that is dependent on the frequency and the allowable ripple amplitude at VOUT1. Experimentation is usually necessary to determine the minimum value for C2, as the nature of the load may require a larger value. A load which creates significant transients requires a larger value for C2 than a non-varying load.
The important parameters are reverse recovery time and forward voltage drop. The reverse recovery time determines how long the current surge lasts each time the buck switch is turned on. The forward voltage drop is significant in the event the output is short-circuited as it is mainly this diode’s voltage (plus the voltage across the current limit sense resistor) which forces the inductor current to decrease during the OFF-time. For this reason, a higher voltage is better, although that affects efficiency. A reverse recovery time of ≊30 ns, and a forward voltage drop of ≊0.75 V are preferred. The reverse leakage specification is important as that can significantly affect efficiency. Other types of diodes may have a lower forward voltage drop, but may have longer recovery times, or greater reverse leakage. D1 should be rated for the maximum VIN, and for the peak current when in current limit (IPK in Figure 11) which is equal to Equation 16.
where
This calculation is only valid when RCL is not required.
Assuming the voltage supply feeding VIN has a source impedance greater than zero, this capacitor limits the ripple voltage at VIN while supplying most of the switch current during the ON-time. At maximum load current, when the buck switch turns on, the current into VIN increases to the lower peak of the output current waveform, ramps up to the peak value, then drops to zero at turnoff. The average current into VIN during this ON-time is the load current. For a worst case calculation, C1 must supply this average load current during the maximum ON-time. The maximum ON-time is calculated using Equation 5, with a 25% tolerance added in Equation 17.
C1 is calculated with Equation 18.
where
TI recommends quality ceramic capacitors with a low ESR for C1. To allow for capacitor tolerances and voltage effects, use a 2.2-µF capacitor.
The capacitor at the VCC pin provides not only noise filtering and stability, but also prevents false triggering of the VCC UVLO at the buck switch ON and OFF transitions. For this reason, C3 should be no smaller than 0.1 µF, and should be a good quality, low ESR, ceramic capacitor. This capacitor also determines the initial start-up delay (t1 in Figure 7).
TI recommends a value of 0.022 µF for C4. TI recommends a high-quality ceramic capacitor with low ESR, because C4 supplies the surge current to charge the buck switch gate at turnon. A low ESR also ensures a complete recharge during each OFF-time.
This capacitor suppresses transients and ringing due to long lead inductance at VIN. TI recommends a low ESR, 0.1-µF ceramic chip capacitor, placed physically close to the LM5010.
The capacitor at the SS pin determines the soft-start time (that is the time for the reference voltage at the regulation comparator and the output voltage), to reach their final value. Determine the time with Equation 19.
For a 5-ms soft-start time, C6 calculates to 0.022 µF.
The current limit threshold is nominally 1.25 A, with a minimum guaranteed value of 1 A. If, at maximum load current, the lower peak of the inductor current (IPK– in Figure 13) exceeds 1 A, resistor RCL must be added between SGND and ISEN to increase the current limit threshold to be equal or exceed that lower peak current. This resistor diverts some of the recirculating current from the internal sense resistor so that a higher current level is needed to switch the internal current limit comparator. Calculate IPK– with Equation 20.
where
RCL is calculated with Equation 21.
where
The next smaller standard value resistor should be used for RCL. With the addition of RCL it is necessary to check the average and peak current values to ensure they do not exceed the LM5010 limits. At maximum load current the average current through the internal sense resistor is calculated with Equation 22.
If IAVE is less than 2 A, no changes are necessary. If it exceeds 2 A, RCL must be reduced. The upper peak of the inductor current (IPK+), at maximum load current, is calculated using Equation 23.
where
If IPK+ exceeds 3.5 A , the inductor value must be increased to reduce the ripple amplitude. This necessitates recalculation of IOR(min), IPK–, and RCL.
When the circuit is in current limit, the upper peak current out of the SW pin is calculated with Equation 24.
The inductor L1 and diode D1 must be rated for this current.
The LM5010 uses a constant-ON-time (COT) control scheme where the ON-time is terminated by a one-shot and the OFF-time is terminated by the feedback voltage (VFB) falling below the reference voltage. Therefore, for stable operation, the feedback voltage must decrease monotonically in phase with the inductor current during the OFF-time. Furthermore, this change in feedback voltage (VFB) during OFF-time must be large enough to dominate any noise present at the feedback node.
Table 3 presents three different methods for generating appropriate voltage ripple at the feedback node. Type 1 and type 2 ripple circuits couple the ripple from the output of the converter to the feedback node (FB). The output voltage ripple has two components:
TYPE 1 | TYPE 2 | TYPE 3 |
---|---|---|
Lowest cost | Reduced ripple | Minimum ripple |
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Equation 25.
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Equation 26.
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Equation 27.
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The capacitive ripple is out of phase with the inductor current. As a result, the capacitive ripple does not decrease monotonically during the OFF-time. The resistive ripple is in phase with the inductor current and decreases monotonically during the OFF-time. The resistive ripple must exceed the capacitive ripple at output (VOUT) for stable operation. If this condition is not satisfied, then unstable switching behavior is observed in COT converters with multiple ON-time bursts in close succession followed by a long OFF-time.
The type 3 ripple method uses a ripple injection circuit with RA, CA, and the switch node (SW) voltage to generate a triangular ramp. This triangular ramp is then AC-coupled into the feedback node (FB) using the capacitor CB. This circuit is suited for applications where low output voltage ripple is imperative because this circuit does not use the output voltage ripple. See AN-1481 Controlling Output Ripple and Achieving ESR Independence in Constant ON-Time (COT) Regulator Designs, (SNVA166) for more details on each ripple generation method.
A minimum load current of 1 mA is required to maintain proper operation. If the load current falls below that level, the bootstrap capacitor can discharge during the long OFF-time and the circuit either shuts down or cycles ON and OFF at a low frequency. If the load current is expected to drop below 1 mA in the application, choose the feedback resistors to be low enough in value to provide the minimum required current at nominal VOUT.
The LM5010 is designed to operate with an input power supply capable of supplying a voltage range from 8 V to 75 V. The input power supply must be well-regulated and capable of supplying sufficient current to the regulator during peak load operation. Also, like in all applications, the power-supply source impedance must be small compared to the module input impedance to maintain the stability of the converter.