SNVSBP5
April 2022
LM5013-Q1
PRODUCTION DATA
1
Features
2
Applications
3
Description
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Control Architecture
7.3.2
Internal VCC Regulator and Bootstrap Capacitor
7.3.3
Regulation Comparator
7.3.4
Internal Soft Start
7.3.5
On-Time Generator
7.3.6
Current Limit
7.3.7
N-Channel Buck Switch and Driver
7.3.8
Schottky Diode Selection
7.3.9
Enable/Undervoltage Lockout (EN/UVLO)
7.3.10
Power Good (PGOOD)
7.3.11
Thermal Protection
7.4
Device Functional Modes
7.4.1
Shutdown Mode
7.4.2
Standby Mode
7.4.3
Active Mode
7.4.4
Sleep Mode
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.2.1
Custom Design With WEBENCH® Tools
8.2.2.2
Switching Frequency (RRON)
8.2.2.3
Buck Inductor (LO)
8.2.2.4
Schottky Diode (DSW)
8.2.2.5
Output Capacitor (COUT)
8.2.2.6
Input Capacitor (CIN)
8.2.2.7
Type 3 Ripple Network
8.2.3
Application Curves
9
Power Supply Recommendations
10
Layout
10.1
Layout Guidelines
10.1.1
Compact PCB Layout for EMI Reduction
10.1.2
Feedback Resistors
10.2
Layout Example
10.2.1
Thermal Considerations
11
Device and Documentation Support
11.1
Device Support
11.1.1
Third-Party Products Disclaimer
11.1.2
Development Support
11.1.2.1
Custom Design With WEBENCH® Tools
11.2
Documentation Support
11.2.1
Related Documentation
11.3
Receiving Notification of Documentation Updates
11.4
Support Resources
11.5
Trademarks
11.6
Electrostatic Discharge Caution
11.7
Glossary
12
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
DDA|8
MPDS092F
Thermal pad, mechanical data (Package|Pins)
DDA|8
PPTD178C
Orderable Information
snvsbp5_oa
snvsbp5_pm
8.2.2
Detailed Design Procedure