SNVS783K January 2012 – August 2021 LM5017
PRODUCTION DATA
PIN | I/O | DESCRIPTION | APPLICATION INFORMATION | |
---|---|---|---|---|
NO. | NAME | |||
1 | RTN | — | Ground | Ground connection of the integrated circuit. |
2 | VIN | P | Input voltage | Operating input range is 7.5 V to 100 V. |
3 | UVLO | I | Undervoltage comparator input | Resistor divider from VIN to UVLO to GND programs the undervoltage detection threshold. An internal current source is enabled when UVLO is above 1.225 V to provide hysteresis. When UVLO pin is pulled below 0.66 V externally, the regulator is in shutdown mode. |
4 | RON | I | On-time control | A resistor between this pin and VIN sets the buck switch on-time as a function of VIN. Minimum recommended on-time is 100 ns at maximum input voltage. |
5 | FB | I | Feedback | This pin is connected to the inverting input of the internal regulation comparator. The regulation level is 1.225 V. |
6 | VCC | O | Output from the internal high-voltage series pass regulator. Regulated at 7.6 V. | The internal VCC regulator provides bias supply for the gate drivers and other internal circuitry. A 1-μF decoupling capacitor is recommended. |
7 | BST | I | Bootstrap capacitor | An external capacitor is required between the BST and SW pins (0.01-μF ceramic). The BST capacitor is charged by the VCC regulator through an internal diode when SW is low. |
8 | SW | P | Switching node | Power switching node. Connect to the output inductor and bootstrap capacitor. |
EP | — | Exposed Pad | Exposed pad must be connected to the RTN pin. Solder to the system ground plane on application board for reduced thermal resistance. |