SNVS788H January   2012  – August 2021 LM5019

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Control Overview
      2. 7.3.2  VCC Regulator
      3. 7.3.3  Regulation Comparator
      4. 7.3.4  Overvoltage Comparator
      5. 7.3.5  On-Time Generator
      6. 7.3.6  Current Limit
      7. 7.3.7  N-Channel Buck Switch and Driver
      8. 7.3.8  Synchronous Rectifier
      9. 7.3.9  Undervoltage Detector
      10. 7.3.10 Thermal Protection
      11. 7.3.11 Ripple Configuration
      12. 7.3.12 Soft Start
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Application Circuit: 12.5 V to 95 V Input and 10 V, 100-mA Output Buck Converter
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Custom Design With WEBENCH® Tools
          2. 8.2.1.2.2 RFB1, RFB2
          3. 8.2.1.2.3 Frequency Selection
          4. 8.2.1.2.4 Inductor Selection
          5. 8.2.1.2.5 Output Capacitor
          6. 8.2.1.2.6 Type II Ripple Circuit
          7. 8.2.1.2.7 VCC and Bootstrap Capacitor
          8. 8.2.1.2.8 Input Capacitor
          9. 8.2.1.2.9 UVLO
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Application Circuit: 20 V to 95 V Input and 10 V, 100 mA Output Isolated Fly-Buck Converter
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
          1. 8.2.2.2.1  Transformer Turns Ratio
          2. 8.2.2.2.2  Total IOUT
          3. 8.2.2.2.3  RFB1, RFB2
          4. 8.2.2.2.4  Frequency Selection
          5. 8.2.2.2.5  Transformer Selection
          6. 8.2.2.2.6  Primary Output Capacitor
          7. 8.2.2.2.7  Secondary Output Capacitor
          8. 8.2.2.2.8  Type III Feedback Ripple Circuit
          9. 8.2.2.2.9  Secondary Diode
          10. 8.2.2.2.10 VCC and Bootstrap Capacitor
          11. 8.2.2.2.11 Input Capacitor
          12. 8.2.2.2.12 UVLO Resistors
          13. 8.2.2.2.13 VCC Diode
        3. 8.2.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
      2. 11.1.2 Development Support
        1. 11.1.2.1 Custom Design With WEBENCH® Tools
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Support Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information
8.2.2.2.11 Input Capacitor

The input capacitor is typically a combination of a smaller bypass capacitor located near the regulator IC and a larger bulk capacitor. The total input capacitance must be large enough to limit the input voltage ripple to a desired amplitude. For input ripple voltage ΔVIN, CIN can be calculated using Equation 28.

Equation 28. GUID-94415718-DAE9-462A-8E12-8219F42EF36F-low.gif

Choosing a ΔVIN of 0.5 V gives a minimum CIN of 0.067 μF. A standard value of 0.1 μF is selected for CBYP in this design. A bulk capacitor of higher value reduces voltage spikes due to parasitic inductance between the power source to the converter. A standard value of 1 μF is selected for CIN in this design. The voltage ratings of the two input capacitors should be greater than the maximum input voltage under all conditions.