SNVS480J January   2007  – July 2020 LM5022

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Typical Application
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 High-Voltage Start-Up Regulator
      2. 7.3.2 Input Undervoltage Detector
      3. 7.3.3 Error Amplifier
      4. 7.3.4 Current Sensing and Current Limiting
      5. 7.3.5 PWM Comparator and Slope Compensation
      6. 7.3.6 Soft Start
      7. 7.3.7 MOSFET Gate Driver
      8. 7.3.8 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Oscillator, Shutdown, and SYNC
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  Switching Frequency
        2. 8.2.2.2  MOSFET
        3. 8.2.2.3  Output Diode
        4. 8.2.2.4  Boost Inductor
        5. 8.2.2.5  Output Capacitor
        6. 8.2.2.6  VCC Decoupling Capacitor
        7. 8.2.2.7  Input Capacitor
        8. 8.2.2.8  Current Sense Filter
        9. 8.2.2.9  RSNS, RS2, and Current Limit
        10. 8.2.2.10 Control Loop Compensation
        11. 8.2.2.11 Efficiency Calculations
          1. 8.2.2.11.1 Chip Operating Loss
          2. 8.2.2.11.2 MOSFET Switching Loss
          3. 8.2.2.11.3 MOSFET and RSNS Conduction Loss
          4. 8.2.2.11.4 Output Diode Loss
          5. 8.2.2.11.5 Input Capacitor Loss
          6. 8.2.2.11.6 Output Capacitor Loss
          7. 8.2.2.11.7 Boost Inductor Loss
          8. 8.2.2.11.8 Total Loss
          9. 8.2.2.11.9 Efficiency
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Filter Capacitors
      2. 10.1.2 Sense Lines
      3. 10.1.3 Compact Layout
      4. 10.1.4 Ground Plane and Shape Routing
    2. 10.2 Layout Examples
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
      2. 11.1.2 Development Support
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Support Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.2.2.5 Output Capacitor

The output capacitor in a boost regulator supplies current to the load during the MOSFET on-time and also filters the AC portion of the load current during the off-time. This capacitor determines the steady-state output voltage ripple, ΔVO, a critical parameter for all voltage regulators. Output capacitors are selected based on their capacitance, CO, their equivalent series resistance (ESR), and their RMS or AC current rating.

The magnitude of ΔVO is comprised of three parts, and in steady-state, the ripple voltage during the on-time is equal to the ripple voltage during the off-time. For simplicity, the analysis is performed for the MOSFET turning off (off-time) only. The first part of the ripple voltage is the surge created as the output diode D1 turns on. At this point, inductor and diode current are at peak value, and the ripple voltage increase can be calculated with Equation 20.

Equation 20. ΔVO1 = IPK × ESR

The second portion of the ripple voltage is the increase due to the charging of CO through the output diode. This portion can be approximated with Equation 21.

Equation 21. ΔVO2 = (IO / CO) × (D / ƒSW)

The final portion of the ripple voltage is a decrease due to the flow of the diode and inductor current through the ESR of the output capacitor. This decrease can be calculated with Equation 22.

Equation 22. ΔVO3 = ΔiL × ESR

The total change in output voltage is Equation 23.

Equation 23. ΔVO = ΔVO1 + ΔVO2 – ΔVO3

The combination of two positive terms and one negative term may yield an output voltage ripple with a net rise or a net fall during the converter off-time. The ESR of the output capacitor or capacitors has a strong influence on the slope and direction of ΔVO. Capacitors with high ESR such as tantalum and aluminum electrolytic create an output voltage ripple that is dominated by ΔVO1 and ΔVO3, with a shape shown in Figure 15. Ceramic capacitors, in contrast, have very low ESR and lower capacitance. The shape of the output ripple voltage is dominated by ΔVO2, with a shape shown in Figure 16.

LM5022 20212226.gifFigure 15. ΔVO Using High-ESR Capacitors
LM5022 20212227.gifFigure 16. ΔVO Using Low-ESR Capacitors

For this example, the small size and high temperature rating of ceramic capacitors make them a good choice. The output ripple voltage waveform of Figure 16 is assumed, and the capacitance is selected first. The desired ΔVO is ±2% of 40 V, or 0.8 VP-P. Beginning with the calculation for ΔVO2, the required minimum capacitance is in Equation 24.

Equation 24. CO-MIN = (IO / ΔVO) × (DMAX / fSW) CO-MIN = (0.5 / 0.8) × (0.77 / 5 x 105) = 0.96 µF

The next higher standard 20% capacitor value is 1 µF, however, to provide margin for component tolerance and load transients, two capacitors rated 4.7 µF each (CO= 9.4 µF) are used. Ceramic capacitors rated 4.7 µF ±20% are available from many manufacturers. The minimum quality dielectric that is suitable for switching power supply output capacitors is X5R, while X7R (or better) is preferred. Pay careful attention to the DC voltage rating and case size, as ceramic capacitors can lose 60% or more of their rated capacitance at the maximum DC voltage. This is the reason that ceramic capacitors are often de-rated to 50% of their capacitance at their working voltage. The output capacitors for this example has a 100-V rating in a 2220 case size.

The typical ESR of the selected capacitors is 3 mΩ each, and in parallel is approximately 1.5 mΩ. The worst-case value for ΔVO1 occurs during the peak current at minimum input voltage in Equation 25.

Equation 25. ΔVO1 = 2.5 × 0.0015 = 4 mV

The worst-case capacitor charging ripple occurs at maximum duty cycle in Equation 26.

Equation 26. ΔVO2 = (0.5 / 9.4 × 10–6) × (0.77 / 5 × 105) = 82 mV

Finally, the worst-case value for ΔVO3 occurs when inductor ripple current is highest, at maximum input voltage in Equation 27.

Equation 27. ΔVO3 = 0.58 × 0.0015 = 1 mV (negligible)

The output voltage ripple can be estimated by summing the three terms in Equation 28.

Equation 28. ΔVO = 4 mV + 82 mV - 1 mV = 85 mV

The RMS current through the output capacitor or capacitors can be estimated using the following, worst-case equation in Equation 29.

Equation 29. LM5022 20212229.gif

The highest RMS current occurs at minimum input voltage. For this example, the maximum output capacitor RMS current is calculated with Equation 30.

Equation 30. IO-RMS(MAX) = 1.13 × 2.3 × (0.78 x 0.22)0.5 = 1.08 ARMS

These 2220 case size devices are capable of sustaining RMS currents of over 3 A each, making them more than adequate for this application.