SNVS961E APRIL   2013  – January 2016 LM5023

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Detailed Pin Description
        1. 7.3.1.1 QR Pin
        2. 7.3.1.2 VSD Pin
        3. 7.3.1.3 SS Pin
        4. 7.3.1.4 COMP Pin
        5. 7.3.1.5 CS Pin
        6. 7.3.1.6 GND Pin
        7. 7.3.1.7 OUT Pin
        8. 7.3.1.8 VCC Pin
      2. 7.3.2 Start-Up
      3. 7.3.3 Quasi-Resonant Operation
      4. 7.3.4 Quasi-Resonant Operating Frequency
      5. 7.3.5 PWM Comparator
      6. 7.3.6 Soft-Start
      7. 7.3.7 Gate Driver
        1. 7.3.7.1 Skip-Cycle Operation
      8. 7.3.8 Current Limit and Current Sense
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Custom Design with WEBENCH Tools
        2. 8.2.2.2 Line Current-Limit Feedforward
          1. 8.2.2.2.1 Overvoltage Protection
        3. 8.2.2.3 Valley Switching
        4. 8.2.2.4 Hiccup Mode
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Custom Design with WEBENCH Tools
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Pin Configuration and Functions

DGK Package
8-Pin VSSOP
Top View
LM5023 pinconfig_nvs961.gif LM5023 Pin Configuration

Pin Functions

PIN TYPE DESCRIPTION
NAME NO.
COMP 4 I Control input for the pulse width modulator and skip cycle comparators. COMP pullup is provided by an internal 42-kΩ resistor which may be used to bias an opto-coupler transistor.
CS 5 I Current sense input for current-mode control and over-current protection. Current limiting is accomplished using a dedicated current sense comparator. If the CS comparator input exceeds 0.5 V, the OUT pin switches low for cycle-by-cycle current limit. CS is held low for 130 ns after OUT switches high to blank the leading edge current spike.
GND 6 G Ground connection return for internal circuits.
OUT 7 O High current output to the external MOSFET gate input with source/sink current capability of 0.3 A and 0.7 A respectively.
QR 1 I The auxiliary flyback winding of the power transformer is monitored to detect the quasi-resonant operation. The peak-auxiliary voltage is sensed to detect an output overvoltage (OVP) fault and shuts down the controller.
SS 3 O An external capacitor and an internal 22-µA current source sets the soft-start ramp.
VSD 2 O Connect this pin to the gate of the external start-up circuit FET; it disables the start-up FET after VCC is valid.
VCC 8 P VCC provides bias to controller and gate drive sections of the LM5023. An external capacitor must be connected from this pin to ground.