The voltage ripple across the output capacitor C_AUX1 is made up of two components:

• Resistive ripple appears across the equivalent series resistance (ESR) of the output capacitor. This component of ripple is in phase with the inductor current and is 90° delayed compared with the applied PWM signal.
• Capacitive ripple appears across the ideal capacitor. This component of ripple is 90° delayed compared with the inductor current ripple and 180° delayed compared with the applied PWM signal.

With COT control, the on-time of the high-side FET is terminated by an on-timer, and the off-time is terminated when the feedback voltage V_{FB_AUX} falls below the reference voltage (V_AUX-ON). For a buck topology this type of hysteretic control provides stable operation if these two conditions are met:

• Output voltage ripple is dominated by the resistive ESR component. The resistive ripple amplitude must be approximately five times the capacitive ripple amplitude to guarantee stable operation.
• Output voltage ripple amplitude present at the FB_AUX pin must be greater than noise coupled onto this pin from other sources. For an output voltage ripple amplitude of 25 mV at the FB_AUX pin ensures that other sources of noise coupled to the pin can be assumed small

Aux transformer magnetising inductor ripple current amplitude is expressed by Equation 43.

Equation 43.

For a buck converter the capacitive component of output voltage ripple amplitude is expressed by Equation 92. The resistive component of output ripple voltage amplitude is expressed by Equation 44.

Equation 44.

Our condition for stable operation requires that Equation 45 and Equation 46 are both satisfied.

Equation 45.

Equation 46.

The method outlined above allows us to calculate the resistance (R_Esr) that must be present in series with the output capacitor (C_AUX1) to provide stable operation of a buck converter. This simple method has disadvantages of high output voltage ripple amplitude and high dissipation in the series resistor R_Esr. The method is also not ideal for a flybuck topology, especially if most of the load current is drawn from the secondary winding. In this case much of the magnetising inductor current flows into the secondary output capacitor (C_AUX2) and not the primary output capacitor (C_AUX1) during the low-side FET conduction period (t_OFF). The circuit of Figure 7-27 provides a better solution that is well suited to the flybuck topology. A series branch R_r – C_r is connected across L_AUX. The controller applies the same PWM voltage across this series branch as appears across L_AUX. Assuming most of the PWM voltage is dropped across R_r, the voltage across C_r has the almost the same shape and phase as the inductor current. The voltage ripple across C_r can be used to substitute the voltage across R_ESR and thus provide stable operation without the need for high output ripple and dissipation. By coupling this capacitor voltage signal directly to the FB_AUX pin we can achieve the same result as a large ESR resistor, but without the penalty of dissipation and high output voltage ripple amplitude. The method is suitable for a flybuck topology, since the down-slope of the magnetising current is synthesised, across C_r, and therefore available on the primary side to couple onto the FB_AUX pin.

Figure 7-27 Minimum Ripple Configuration

The impedance of the capacitor generating the synthesised inductor current ripple signal, at the Aux switching frequency (f_{SW_AUX}), must be low compared with the impedance of the R_FBx divider network.

Equation 47.

The synthesised inductor ripple, generated across C_r, is added to the ripple across the output capacitor (C_AUX1). The resultant signal is coupled to the FB_AUX pin via capacitor C_ac. The value of series resistor R_r is chosen to ensure the synthesised resistive ripple amplitude satisfies Equation 45 giving Equation 48.

Equation 48.

Capacitor C_ac couples the ripple signal directly onto the FB_AUX pin. Ensure that the value of this capacitor is at least five times greater than the value of C_r. This ratio ensures minimum attenuation and phase shift of the coupled ripple signal.

Equation 49.