SNVS629F
May 2011 – December 2019
LM5050-1
,
LM5050-1-Q1
PRODUCTION DATA.
1
Features
2
Applications
3
Description
Device Images
Full Application
Typical Redundant Supply Configuration
4
Revision History
5
Pin Configuration and Functions
Pin Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings: LM5050-1
6.3
ESD Ratings: LM5050-1-Q1
6.4
Recommended Operating Conditions
6.5
Thermal Information
6.6
Electrical Characteristics
6.7
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
IN, GATE, and OUT Pins
7.3.2
VS Pin
7.3.3
OFF Pin
7.4
Device Functional Modes
7.4.1
ON/OFF Control Mode
7.4.2
External Power Supply Mode
8
Application and Implementation
8.1
Application Information
8.1.1
MOSFET Selection
8.1.2
Short Circuit Failure of an Input Supply
8.2
Typical Applications
8.2.1
Typical Application With Input and Output Transient Protection
8.2.1.1
Design Requirements
8.2.1.2
Detailed Design Procedure
8.2.1.2.1
Power Supply Components (R1 C1,) Selection
8.2.1.2.2
MOSFET (Q1) Selection
8.2.1.2.3
D1 and D2 Selection for Inductive Kick-Back Protection
8.2.1.3
Application Curves
8.2.2
Using a Separate VS Supply for Low Vin Operation
8.2.3
ORing of Two Power Sources
8.2.4
Reverse Input Voltage Protection With IQ Reduction
8.2.5
Basic Application With Input Transient Protection
8.2.6
48-V Application With Reverse Input Voltage (VIN = –48 V) Protection
8.2.6.1
Application Curves
9
Power Supply Recommendations
10
Layout
10.1
Layout Guidelines
10.2
Layout Example
11
Device and Documentation Support
11.1
Documentation Support
11.1.1
Related Documentation
11.2
Related Links
11.3
Community Resources
11.4
Trademarks
11.5
Electrostatic Discharge Caution
11.6
Glossary
12
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
DDC|6
MPDS124I
Thermal pad, mechanical data (Package|Pins)
Orderable Information
snvs629f_oa
snvs629f_pm
8.2.3
ORing of Two Power Sources
Figure 28.
ORing of Two Power Sources