The LM5088 features unique circuitry to reduce the dropout voltage. Dropout voltage is defined as the difference between the minimum input voltage to maintain regulation and the output voltage (V_IN(min) – V_OUT). Dropout voltage thus determines the lowest input voltage at which the converter maintains regulation. In a buck converter, dropout voltage primarily depends upon the maximum duty cycle. The maximum duty cycle is dependent on the oscillator frequency and minimum off time.

An approximation for the dropout voltage is:

Equation 4.

where

• T_OSC = 1 / f_SW.
• T_{OFF (max)} is the forced off time (280 ns typical, 365 ns maximum).
• f_SW is the oscillator frequency.
• T_OSC is the oscillator period.

From the above equation, it can be seen that for a given output voltage, reducing the dropout voltage requires either reducing the forced off time or oscillator frequency (1/T_OSC). The forced off time is limited by the time required to replenish the bootstrap capacitor and time required to sample the re-circulating diode current. The 365-ns forced off time of the LM5088 controller is a good trade-off between these two requirements. Thus, the LM5088 reduces dropout voltage by dynamically decreasing the operating frequency during dropout. The dynamic frequency control (DFC) is achieved using a dropout monitor, which detects a dropout condition and reduces the operating frequency. The operating frequency continues to decrease with decreasing input voltage until the frequency falls to the minimum value set by the DFC circuitry.

If the V_IN voltage continues to fall below this point, output regulation can no longer be maintained. The oscillator frequency reverts back to the nominal operating frequency set by the RT resistor when the input voltage increases above the dropout range. DFC circuitry does not affect the PWM during normal operating conditions.

Figure 7-4 Dropout Voltage Reduction using Dynamic Frequency Control