SNVS300H July   2004  – September 2016 LM5111

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Options
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Switching Characteristics
    7. 7.7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Undervoltage Lockout
      2. 8.3.2 Output Stage
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 VCC
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
    1. 10.1 Bias Supply Voltage
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Thermal Considerations
      1. 11.3.1 Drive Power Requirement Calculations in LM5111
      2. 11.3.2 Continuous Current Rating of LM5111
  12. 12Device and Documentation Support
    1. 12.1 Receiving Notification of Documentation Updates
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

10 Power Supply Recommendations

10.1 Bias Supply Voltage

The recommended bias supply voltage range for LM5111 is from 3.5 V to 14 V. The upper end of this range is driven by the 15-V absolute maximum voltage rating of the VCC. TI recommends keeping proper margin to allow for transient voltage spikes. A local bypass capacitor must be placed between the VCC and VEE pins, and this capacitor must be placed as close to the device as possible. TI recommends a low ESR, ceramic surface mount capacitor. TI recommends using 2 capacitors across VCC and VEE: a 100-nF ceramic surface-mount capacitor for high frequency filtering placed very close to VCC and VEE pin, and another surface-mount capacitor, 220 nF to 10 µF, for IC bias requirements.