SNVS725I June   2011  – October 2019 LM5113

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Simplified Application Diagram
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Input and Output
      2. 7.3.2 Start-Up and UVLO
      3. 7.3.3 HS Negative Voltage and Bootstrap Supply Voltage Clamping
      4. 7.3.4 Level Shift
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 VDD Bypass Capacitor
        2. 8.2.2.2 Bootstrap Capacitor
        3. 8.2.2.3 Power Dissipation
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Examples
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Support Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.6 Switching Characteristics

over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tLPHL LO turnoff propagation delay LI falling to LOL falling TJ = 25°C 26.5 ns
TJ = –40°C to 125°C 45.0
tLPLH LO turnon propagation delay LI rising to LOH rising TJ = 25°C 28.0 ns
TJ = –40°C to 125°C 45.0
tHPHL HO turnoff propagation delay HI falling to HOL falling TJ = 25°C 26.5 ns
TJ = –40°C to 125°C 45.0
tHPLH HO turnon propagation delay HI rising to HOH rising TJ = 25°C 28.0 ns
TJ = –40°C to 125°C 45.0
tMON Delay matching
LO on & HO off		 TJ = 25°C 1.5 ns
TJ = –40°C to 125°C 8.0
tMOFF Delay matching
LO off & HO on		 TJ = 25°C 1.5 ns
TJ = –40°C to 125°C 8.0
tHRC HO rise time (0.5 V – 4.5 V) CL = 1000 pF 7.0 ns
tLRC LO rise time (0.5 V – 4.5 V) CL = 1000 pF 7.0 ns
tHFC HO fall time (0.5 V – 4.5 V) CL = 1000 pF 1.5 ns
tLFC LO fall time (0.5 V – 4.5 V) CL = 1000 pF 1.5 ns
tPW Minimum input pulse width
that changes the output		 10 ns
tBS Bootstrap diode
reverse recovery time		 IF = 100 mA, IR = 100 mA 40 ns
(1) Minimum and maximum limits are 100% production tested at 25°C. Limits over the operating temperature range are ensured through correlation using Statistical Quality Control (SQC) methods. Limits are used to calculate Average Outgoing Quality Level (AOQL).
LM5113 30162904.gifFigure 1. Timing Diagram