SNVS676I August   2010  – April  2018 LM5119

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Simplified Application Circuit
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  High Voltage Start-Up Regulator
      2. 7.3.2  UVLO
      3. 7.3.3  Enable 2
      4. 7.3.4  Oscillator and Sync Capability
      5. 7.3.5  Error Amplifiers and PWM Comparators
      6. 7.3.6  Ramp Generator
      7. 7.3.7  Current Limit
      8. 7.3.8  Hiccup Mode Current Limiting
      9. 7.3.9  Soft Start
      10. 7.3.10 HO and LO Output Drivers
      11. 7.3.11 Maximum Duty Cycle
      12. 7.3.12 Thermal Protection
    4. 7.4 Device Functional Modes
      1. 7.4.1 Diode Emulation
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Miscellaneous Functions
      2. 8.1.2 Interleaved Two-Phase Operation
      3. 8.1.3 Interleaved 4-Phase Operation
    2. 8.2 Typical Applications
      1. 8.2.1 Dual-output Design Example
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1  Timing Resistor
          2. 8.2.1.2.2  Output Inductor
          3. 8.2.1.2.3  Current Sense Resistor
          4. 8.2.1.2.4  Ramp Resistor and Ramp Capacitor
          5. 8.2.1.2.5  Output Capacitors
          6. 8.2.1.2.6  Input Capacitors
          7. 8.2.1.2.7  VCC Capacitor
          8. 8.2.1.2.8  Bootstrap Capacitor
          9. 8.2.1.2.9  Soft-Start Capacitor
          10. 8.2.1.2.10 Restart Capacitor
          11. 8.2.1.2.11 Output Voltage Divider
          12. 8.2.1.2.12 UVLO Divider
            1. 8.2.1.2.12.1 MOSFET Selection
          13. 8.2.1.2.13 MOSFET Snubber
          14. 8.2.1.2.14 Error Amplifier Compensation
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Two-Phase Design Example
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
        3. 8.2.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Switching Jitter Root Causes and Solutions
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.3.3 Enable 2

The LM5119 contains an enable function allowing shutdown control of channel2, independent of channel1. If the EN2 pin is pulled below 2 V, channel2 enters shutdown mode. If the EN2 input is greater than 2.5 V, channel2 returns to normal operation. An internal 50-kΩ pullup resistor on the EN2 pin allows this pin to be left floating for normal operation. The EN2 input can be used in conjunction with the UVLO pin to sequence the two regulator channels. If EN2 is held low as the UVLO pin increases to a voltage greater than the 1.25-V UVLO threshold, channel1 begins operation while channel2 remains off. Both channels become operational when the UVLO, EN2, VCC1, and VCC2 pins are above their respective operating thresholds. Either channel of the LM5119 can also be disabled independently by pulling the corresponding SS pin to AGND.