SNVSC77
December 2024
LM5125-Q1
ADVANCE INFORMATION
1
1
Features
2
Applications
3
Description
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Electrical Characteristics
5.6
Timing Requirements
6
Detailed Description
6.1
Overview
6.2
Functional Block Diagram
6.3
Feature Description
6.3.1
Device Configuration (CFG0-pin, CFG1-pin, CFG2-pin)
6.3.2
Switching Frequency and Synchronization (SYNCIN)
6.3.3
Dual Random Spread Spectrum (DRSS)
6.3.4
Operation Modes (BYPASS, DEM, FPWM)
6.3.5
Dual- and Multi-phase Operation
6.3.6
BIAS (BIAS-pin)
6.3.7
Soft Start (SS-pin)
6.3.8
VOUT Programming (VOUT, ATRK, DTRK)
6.3.9
Protections
6.3.10
VOUT Overvoltage Protection (OVP)
6.3.11
Thermal Shutdown (TSD)
6.3.12
Power-Good Indicator (PGOOD-pin)
6.3.13
Current Sensing, Peak Current Limit, and Slope Compensation (CSP1, CSP2, CSN1, CSN2)
6.3.14
Current Sense Programming (CSP1, CSP2, CSN1, CSN2)
6.3.15
Input Current Limit and Monitoring (ILIM, IMON, DLY)
6.3.16
Signal Deglitch Overview
6.3.17
MOSFET Drivers, Integrated Boot Diode, and Hiccup Mode Fault Protection (LOx, HOx, HBx-pin)
6.4
Device Functional Modes
6.4.1
Shutdown State
7
Application and Implementation
7.1
Application Information
7.1.1
Feedback Compensation
7.2
Typical Application
7.2.1
Application
7.2.2
Design Requirements
7.2.3
Detailed Design Procedure
7.2.3.1
Determine the Total Phase Number
7.2.3.2
Determining the Duty Cycle
7.2.3.3
Timing Resistor RT
7.2.3.4
Inductor Selection Lm
7.2.3.5
Current Sense Resistor Rcs
7.2.3.6
Current Sense Filter RCSFP, RCSFN, CCS
7.2.3.7
Low-Side Power Switch QL
7.2.3.8
High-Side Power Switch QH and Additional Parallel Schottky Diode
7.2.3.9
Snubber Components
7.2.3.10
Vout Programming
7.2.3.11
Input Current Limit (ILIM/IMON)
7.2.3.12
UVLO Divider
7.2.3.13
Soft Start
7.2.3.14
CFG Settings
7.2.3.15
Output Capacitor Cout
7.2.3.16
Input Capacitor Cin
7.2.3.17
Bootstrap Capacitor
7.2.3.18
VCC Capacitor CVCC
7.2.3.19
BIAS Capacitor
7.2.3.20
VOUT Capacitor
7.2.3.21
Loop Compensation
7.2.4
Application Curves
7.2.4.1
Efficiency
7.2.4.2
Steady State Waveforms
7.2.4.3
Step Load Response
7.2.4.4
Sync Operation
7.2.4.5
Thermal Performance
7.3
Power Supply Recommendations
7.4
Layout
7.4.1
Layout Guidelines
7.4.2
Layout Example
8
Device and Documentation Support
8.1
Documentation Support
8.1.1
Related Documentation
8.2
Receiving Notification of Documentation Updates
8.3
Support Resources
8.4
Trademarks
8.5
Electrostatic Discharge Caution
8.6
Glossary
9
Revision History
10
Mechanical, Packaging, and Orderable Information
10.1
Tape and Reel Information
85
Package Options
Mechanical Data (Package|Pins)
RHB|32
MPQF130D
Thermal pad, mechanical data (Package|Pins)
1
Features
AEC-Q100 qualified for automotive applications
Temperature grade 1: T
A
= –40°C to +125°C
Functional Safety-Capable
Documentation available to aid functional safety system design
Input voltage 4.5V to 42V
Minimum 2.5V for V
(BIAS)
≥ 4.5V or V
OUT
≥ 6V
Output Voltage 6V to 60V
2% accuracy, internal feedback resistors
Bypass operation for V
I
> V
OUT
Dynamic output voltage tracking
Digital PWM tracking (DTRK)
Analog tracking (ATRK)
Overvoltage protection (64V, 50V, 35V, 28.5V)
Low shutdown I
Q
of 2μA typ. (5μA maximum)
Low operating I
Q
of 1.4mA typ. (2mA maximum)
Stacking with interleaved multiphase operation
Up to 4-phases without external clock
Switching frequency from 100kHz to 2.2MHz
Synchronization to external clock (SYNCIN)
Dynamically selectable switching modes (FPWM, diode emulation)
Spread spectrum (DRSS)
Selectable dead time (18ns to 200ns)
Current sense resistor or DCR sensing
Average inductor current monitor
Average input current limit
Programmable current limit
Selectable delay time
Power-good indicator
Programmable V
I
undervoltage lockout (UVLO)
Lead-less VQFN-32 package with wettable flanks