SNVSAI4B November 2017 – November 2020 LM5145
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
The LM5145 contains an internal high-voltage VCC regulator that provides a bias supply for the PWM controller and its gate drivers for the external MOSFETs. The input pin (VIN) can be connected directly to an input voltage source up to 75 V. The output of the VCC regulator is set to 7.5 V. However, when the input voltage is below the VCC setpoint level, the VCC output tracks VIN with a small voltage drop. Connect a ceramic decoupling capacitor between 1 µF and 5 µF from VCC to AGND for stability.
The VCC regulator output has a current limit of 40 mA (minimum). At power up, the regulator sources current into the capacitor connected to the VCC pin. When the VCC voltage exceeds its rising UVLO threshold of 4.93 V, the output is enabled (if EN/UVLO is above 1.2 V), and the soft-start sequence begins. The output remains active until the VCC voltage falls below its falling UVLO threshold of 4.67 V (typical) or if EN/UVLO goes to a standby or shutdown state.
Internal power dissipation of the VCC regulator can be minimized by connecting the output voltage or an auxiliary bias supply rail (up to 13 V) to VCC using a diode DVCC as shown in Figure 8-2. A diode in series with the input prevents reverse current flow from VCC to VIN if the input voltage falls below the external VCC rail.
Note that a finite bias supply regulator dropout voltage exists and is manifested to a larger extent when driving high gate charge (QG) power MOSFETs at elevated switching frequencies. For example, at VVIN = 6 V, the VCC voltage is 5.8 V with a DC operating current, IVCC, of 20 mA. Such a low gate drive voltage may be insufficient to fully enhance the power MOSFETs. At the very least, MOSFET on-state resistance, RDS(ON), can increase at such low gate drive voltage.
Here are the main considerations when operating at input voltages below 7.5 V: