SNVSBZ7 October   2021 LM5158 , LM51581

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Description (continued)
  6. Device Comparison Table
  7. Pin Configuration and Functions
  8. Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Typical Characteristics
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1  Line Undervoltage Lockout (EN/UVLO/SYNC Pin)
      2. 9.3.2  High Voltage VCC Regulator (BIAS, VCC Pin)
      3. 9.3.3  Soft Start (SS Pin)
      4. 9.3.4  Switching Frequency (RT Pin)
      5. 9.3.5  Dual Random Spread Spectrum – DRSS (MODE Pin)
      6. 9.3.6  Clock Synchronization (EN/UVLO/SYNC Pin)
      7. 9.3.7  Current Sense and Slope Compensation
      8. 9.3.8  Current Limit and Minimum On Time
      9. 9.3.9  Feedback and Error Amplifier (FB, COMP Pin)
      10. 9.3.10 Power-Good Indicator (PGOOD Pin)
      11. 9.3.11 Hiccup Mode Overload Protection (MODE Pin)
      12. 9.3.12 Maximum Duty Cycle Limit and Minimum Input Supply Voltage
      13. 9.3.13 Internal MOSFET (SW Pin)
      14. 9.3.14 Overvoltage Protection (OVP)
      15. 9.3.15 Thermal Shutdown (TSD)
    4. 9.4 Device Functional Modes
      1. 9.4.1 Shutdown Mode
      2. 9.4.2 Standby Mode
      3. 9.4.3 Run Mode
        1. 9.4.3.1 Spread Spectrum Enabled
        2. 9.4.3.2 Hiccup Mode Protection Enabled
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Boost Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Custom Design With WEBENCH® Tools
        2. 10.2.2.2 Recommended Components
        3. 10.2.2.3 Inductor Selection (LM)
        4. 10.2.2.4 Output Capacitor (COUT)
        5. 10.2.2.5 Input Capacitor
        6. 10.2.2.6 Diode Selection
      3. 10.2.3 Application Curve
    3. 10.3 System Examples
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Examples
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Third-Party Products Disclaimer
      2. 13.1.2 Development Support
        1. 13.1.2.1 Custom Design With WEBENCH® Tools
    2. 13.2 Documentation Support
      1. 13.2.1 Related Documentation
    3. 13.3 Receiving Notification of Documentation Updates
    4. 13.4 Support Resources
    5. 13.5 Trademarks
    6. 13.6 Electrostatic Discharge Caution
    7. 13.7 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Dual Random Spread Spectrum – DRSS (MODE Pin)

The device provides a digital spread spectrum, which reduces the EMI of the power supply over a wide frequency range. This function is enabled by a single resistor (37.4 kΩ or 100 kΩ) between the MODE pin and the AGND pin or by programming the MODE pin voltage (370 mV or greater than 1.0 V) during initial power up. When spread spectrum is enabled, the internal modulator dithers the internal clock. When an external synchronization clock is applied to the SYNC pin, the internal spread spectrum is disabled. DRSS (a) combines a low frequency triangular modulation profile (b) with a high frequency cycle-by-cycle random modulation profile (c). The low frequency triangular modulation improves performance in lower radio frequency bands (for example, the AM band), while the high frequency random modulation improves performance in higher radio frequency bands (for example, the FM band). In addition, the frequency of the triangular modulation is further modulated randomly to reduce the likelihood of any audible tones. In order to minimize output voltage ripple caused by spread spectrum, duty cycle is modified on a cycle-by-cycle basis to maintain a nearly constant duty cycle when dithering is enabled (see Figure 9-9).

GUID-EFDB5355-5A36-4884-B236-8C4E3629BD51-low.gifFigure 9-9 Dual Random Spread Spectrum