SNVSBC2A June   2019  – April 2024 LM5163-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1  Control Architecture
      2. 6.3.2  Internal VCC Regulator and Bootstrap Capacitor
      3. 6.3.3  Regulation Comparator
      4. 6.3.4  Internal Soft Start
      5. 6.3.5  On-Time Generator
      6. 6.3.6  Current Limit
      7. 6.3.7  N-Channel Buck Switch and Driver
      8. 6.3.8  Synchronous Rectifier
      9. 6.3.9  Enable/Undervoltage Lockout (EN/UVLO)
      10. 6.3.10 Power Good (PGOOD)
      11. 6.3.11 Thermal Protection
    4. 6.4 Device Functional Modes
      1. 6.4.1 Shutdown Mode
      2. 6.4.2 Active Mode
      3. 6.4.3 Sleep Mode
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Custom Design With WEBENCH® Tools
        2. 7.2.2.2 Switching Frequency (RRON)
        3. 7.2.2.3 Buck Inductor (LO)
        4. 7.2.2.4 Output Capacitor (COUT)
        5. 7.2.2.5 Input Capacitor (CIN)
        6. 7.2.2.6 Type-3 Ripple Network
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
        1. 7.4.1.1 Compact PCB Layout for EMI Reduction
        2. 7.4.1.2 Feedback Resistors
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Third-Party Products Disclaimer
      2. 8.1.2 Development Support
        1. 8.1.2.1 Custom Design With WEBENCH® Tools
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.4.3 Sleep Mode

The Section 6.3.1 section gives a brief introduction to the LM5163-Q1 diode emulation (DEM) feature. The converter enters DEM during light-load conditions when the inductor current decays to zero and the synchronous MOSFET is turned off to prevent negative current in the system. In the DEM state, the load current is lower than half of the peak-to-peak inductor current ripple and the switching frequency decreases when the load is further decreased as the device operates in a pulse skipping mode. A switching pulse is set when VFB drops below 1.2 V.

As the frequency of operation decreases and VFB remains above 1.2 V (VREF) with the output capacitor sourcing the load current for greater than 15 µs, the converter enters an ultra-low IQ sleep mode to prevent draining the input power supply. The input quiescent current (IQ) required by the LM5163-Q1 decreases to 10 µA in sleep mode, improving the light-load efficiency of the regulator. In this mode, all internal controller circuits are turned off to ensure very low current consumption by the device. Such low IQ renders the LM5163-Q1 as the best option to extend operating lifetime for off-battery applications. The FB comparator and internal bias rail are active to detect when the FB voltage drops below the internal reference VREF and the converter transitions out of sleep mode into active mode. There is a 9-µs wake-up delay from sleep to active states.