SNVSCM3 June 2024 LM5171
PRODUCTION DATA
An external resistor divider as shown in Figure 6-9 establishes a voltage at the IPK pin to program the cycle-by-cycle current limit threshold. The threshold applies to both CH-1 and CH-2 controller circuits. During operation, each controller circuit has a real time detection circuit to monitor the channel current sense signal. Once the current sense voltage reaches the programmed threshold, the controller terminates the main switch duty cycle, thereby preventing the peak current from exceeding the threshold, and this function is fulfilled in each switching cycle. Device register faults when 9 peak current limit switching cycles occured in operation and resumes itself when 4 non peak current limit cycles occur.
To set the inductor peak current limit threshold, the programming voltage at the IPK pin must satisfy Equation 12:
Where VIPK is determined by Equation 13
IPK must be greater than the inductor peak current at full load, and lower than the rated saturation current Isat of the inductor.
It is recommended to select RIPKT and RIPKB such that they do not draw more than 0.1mA from VREF pin, in order to keep the overall VREF current consumption low.
Note that when the IPK pin voltage is greater than 3.3V, owing to an open RIPKB or a short RIPKT or some other reasons, an internal monitor circuit shuts down the switching off both controllers of the LM5171 by pulling SS1 and SS2 low internally, preventing the LM5171 from operating with erroneous peak current limit threshold.