SNVSCM3 June 2024 LM5171
PRODUCTION DATA
MIN | NOM | MAX | UNIT | |||
---|---|---|---|---|---|---|
I2C INTERFACE | ||||||
fSCL | SCL clock frequency | Standard mode | 0 | 100 | kHz | |
Fast mode | 0 | 400 | ||||
Fast mode plus (1) | 0 | 1000 | ||||
tLOW | LOW period of the SCL clock | Standard mode | 4.7 | µs | ||
Fast mode | 1.3 | |||||
Fast mode plus (1) | 0.5 | |||||
tHIGH | HIGH period of the SCL clock | Standard mode | 4.0 | µs | ||
Fast mode | 0.6 | |||||
Fast mode plus (1) | 0.26 | |||||
tBUF | Bus free time between a STOP and a START condition |
Standard mode | 4.7 | µs | ||
Fast mode | 1.3 | |||||
Fast mode plus (1) | 0.5 | |||||
tSU:STA | Set-up time for a repeated START condition |
Standard mode | 4.7 | µs | ||
Fast mode | 0.6 | |||||
Fast mode plus (1) | 0.26 | |||||
tHD:STA | Hold time (repeated) START condition |
Standard mode | 4.0 | µs | ||
Fast mode | 0.6 | |||||
Fast mode plus (1) | 0.26 | |||||
tHD:DAT | Data hold time | Standard mode | 0 | µs | ||
Fast mode | 0 | |||||
Fast mode plus (1) | 0 | |||||
tr | Rise time of both SDA and SCL signals |
Standard mode | 1000 | ns | ||
Fast mode | 20 | 300 | ||||
Fast mode plus (1) | 20 | |||||
tf | Fall time of both SDA and SCL signals |
Standard mode | 300 | ns | ||
Fast mode | 20×VDD/5.5 | 300 | ||||
Fast mode plus (1) | 20×VDD/5.5 | 120 | ||||
tsu:STO | Set-up time for STOP condition | Standard mode | 4.0 | µs | ||
Fast mode | 0.6 | |||||
Fast mode plus (1) | 0.26 | |||||
tVD;DAT | Data valid time | Standard mode | 3.45 | µs | ||
Fast mode | 0.9 | |||||
Fast mode plus (1) | 0.45 | |||||
tVD;ACK | Data valid acknowledge time | Standard mode | 3.45 | µs | ||
Fast mode | 0.9 | |||||
Fast mode plus (1) | 0.45 | |||||
Cb | Capacitive load for each bus line | Standard mode | 400 | pF | ||
Fast mode | 400 |