SNVSCL2 December   2024 LM51770

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Handling Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. 7 Parameter Measurement Information
    1. 7.1 Gate Driver Rise Time and Fall Time
    2. 7.2 Gate Driver Dead (Transition) Time
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Power-On Reset (POR System)
      2. 8.3.2  Buck-Boost Control Scheme
        1. 8.3.2.1 Boost Mode
        2. 8.3.2.2 Buck Mode
        3. 8.3.2.3 Buck-Boost Mode
      3. 8.3.3  Power Save Mode
      4. 8.3.4  Supply Voltage Selection – VMAX Switch
      5. 8.3.5  Enable and Undervoltage Lockout
      6. 8.3.6  Oscillator Frequency Selection
      7. 8.3.7  Frequency Synchronization
      8. 8.3.8  Voltage Regulation Loop
      9. 8.3.9  Output Voltage Tracking
      10. 8.3.10 Slope Compensation
      11. 8.3.11 Configurable Soft Start
      12. 8.3.12 Peak Current Sensor
      13. 8.3.13 Current Monitoring and Current Limit Control Loop
      14. 8.3.14 Short Circuit - Hiccup Protection
      15. 8.3.15 nFLT Pin and Protections
      16. 8.3.16 Device Configuration Pin
      17. 8.3.17 Dual Random Spread Spectrum – DRSS
      18. 8.3.18 Gate Driver
    4. 8.4 Device Functional Modes
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Detailed Design Procedure
        1. 9.2.1.1  Custom Design with WEBENCH Tools
        2. 9.2.1.2  Frequency
        3. 9.2.1.3  Feedback Divider
        4. 9.2.1.4  Inductor and Current Sense Resistor Selection
        5. 9.2.1.5  Slope Compensation
        6. 9.2.1.6  Output Capacitor
        7. 9.2.1.7  Input Capacitor
        8. 9.2.1.8  UVLO Divider
        9. 9.2.1.9  Soft-Start Capacitor
        10. 9.2.1.10 MOSFETs QH1 and QL1
        11. 9.2.1.11 MOSFETs QH2 and QL2
        12. 9.2.1.12 Frequency Compensation
        13. 9.2.1.13 External Component Selection
      2. 9.2.2 Application Curves
  11. 10Power Supply Recommendations
  12. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Power Stage Layout
      2. 11.1.2 Gate Driver Layout
      3. 11.1.3 Controller Layout
    2. 11.2 Layout Example
  13. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
      2. 12.1.2 Development Support
        1. 12.1.2.1 Custom Design with WEBENCH Tools
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  14. 13Revision History
  15. 14Mechanical, Packaging, and Orderable Information
    1.     80

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.3.10 Slope Compensation

The provides a slope compensation pin to ensure stable operation and the best transient performance over a wide operating range. According to peak current mode control theory, slope compensation is required at operation with duty cycle greater than 50%. The value for the resistor on the SLOPE pin is calculated with Equation 11.

Equation 11. R ( S L O P E ) =   L R ( C S ) × 50 × 10 6 V A s

During the design process, consider the following guidelines for the slope compensation:

  1. The quotient of peak current sense resistor, R(CS), and the main inductor, L, need to be smaller than the factor given by Equation 12.
    Equation 12. R ( C S ) L < 1 V   × f ( s w ) V o × 10

    where

    • VO is the maximum output voltage of a system with dynamic voltage changes.
  2. The quotient is within the limits given by Equation 13.
    Equation 13. 100   H z   <   R ( C S ) L   <   8000   H z