SNVSCG7 November   2024 LM5190

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1  Input Voltage Range (VIN)
      2. 6.3.2  High-Voltage Bias Supply Regulator (VCC, BIAS)
      3. 6.3.3  Precision Enable (EN)
      4. 6.3.4  Power-Good Monitor (PGOOD)
      5. 6.3.5  Switching Frequency (RT)
      6. 6.3.6  Low Dropout Mode
      7. 6.3.7  Dual Random Spread Spectrum (DRSS)
      8. 6.3.8  Soft Start
      9. 6.3.9  Output Voltage Setpoint (FB)
      10. 6.3.10 Minimum Controllable On Time
      11. 6.3.11 Inductor Current Sense (ISNS+, VOUT)
      12. 6.3.12 Voltage Loop Error Amplifier
      13. 6.3.13 Current Monitor, Programmable Current Limit, and Current Loop Error Amplifier (IMON/ILIM, ISET)
      14. 6.3.14 Dual Loop Architecture
      15. 6.3.15 PWM Comparator
      16. 6.3.16 Slope Compensation
      17. 6.3.17 Hiccup Mode Current Limiting
      18. 6.3.18 High-Side and Low-Side Gate Drivers (HO, LO)
    4. 6.4 Device Functional Modes
      1. 6.4.1 Sleep Mode
      2. 6.4.2 Forced PWM Mode and Synchronization (FPWM/SYNC)
      3. 6.4.3 Thermal Shutdown
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Power Train Components
        1. 7.1.1.1 Buck Inductor
        2. 7.1.1.2 Output Capacitors
        3. 7.1.1.3 Input Capacitors
        4. 7.1.1.4 Power MOSFETs
        5. 7.1.1.5 EMI Filter
      2. 7.1.2 Error Amplifier and Compensation
    2. 7.2 Typical Applications
      1. 7.2.1 High Efficiency 400kHz CC-CV Regulator
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
          1. 7.2.1.2.1 Buck Inductor
          2. 7.2.1.2.2 Current-Sense Resistance
          3. 7.2.1.2.3 Output Capacitors
          4. 7.2.1.2.4 Input Capacitors
          5. 7.2.1.2.5 Frequency Set Resistor
          6. 7.2.1.2.6 Feedback Resistors
        3. 7.2.1.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
        1. 7.4.1.1 Power Stage Layout
        2. 7.4.1.2 Gate-Drive Layout
        3. 7.4.1.3 PWM Controller Layout
        4. 7.4.1.4 Thermal Design and Layout
        5. 7.4.1.5 Ground Plane Design
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
        1. 8.2.1.1 PCB Layout Resources
        2. 8.2.1.2 Thermal Design Resources
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.1.1.5 EMI Filter

Switching regulators exhibit negative input impedance, which is lowest at the minimum input voltage. An underdamped LC filter exhibits a high output impedance at the resonant frequency of the filter. For stability, the filter output impedance must be less than the absolute value of the converter input impedance.

Equation 28. ZIN=-VSUPPLY(MIN)2PSUPPLY

The passive EMI filter design steps are as follows:

  • Calculate the required attenuation of the EMI filter at the switching frequency, where CIN represents the existing capacitance at the input of the switching converter.
  • Input filter inductor LF is usually selected between 1μH and 10μH, but can be lower to reduce losses in a high-current design.
  • Calculate input filter capacitor CF.

LM5190 Passive π-Stage EMI Filter for Buck Regulator Figure 7-2 Passive π-Stage EMI Filter for Buck Regulator

By calculating the first harmonic current from the Fourier series of the input current waveform and multiplying by the input impedance (the impedance is defined by the existing input capacitor CIN), a formula is derived to obtain the required attenuation as shown by Equation 29.

Equation 29. A t t n = 20 l o g I L O U T ( P E A K ) π 2 × f S W × C I N × s i n π × D M A X × 1 1 μ V - V M A X

where

  • VMAX is the allowed dBμV noise level for the applicable conducted EMI specification.
  • CIN is the existing input capacitance of the buck regulator.
  • DMAX is the maximum duty cycle.
  • ILOUT(PEAK) is the peak inductor current.

For filter design purposes, the current at the input can be modeled as a square-wave. Determine the passive EMI filter capacitance CF from Equation 30.

Equation 30. C F = 1 L F 10 A t t n 40 2 π × f S W 2

Adding an input filter to a switching regulator modifies the control-to-output transfer function. The output impedance of the filter must be sufficiently small so that the input filter does not significantly affect the loop gain of the buck converter. The impedance peaks at the filter resonant frequency. The resonant frequency of the passive filter is given by Equation 31.

Equation 31. f r e s = 1 2 π × L F × C F

The purpose of RD is to reduce the peak output impedance of the filter at the resonant frequency. Capacitor CD blocks the DC component of the input voltage to avoid excessive power dissipation in RD. Capacitor CD must have lower impedance than RD at the resonant frequency with a capacitance value greater than that of the input capacitor CIN. This requirement prevents CIN from interfering with the cutoff frequency of the main filter. Added input damping is needed when the output impedance of the filter is high at the resonant frequency (Q of filter formed by LF and CIN is too high). An electrolytic capacitor CD can be used for input damping with a value given by Equation 32.

Equation 32. C D ≥ 4 × C I N

Select the input damping resistor RD using Equation 33.

Equation 33. RD=LFCIN