SNVSAA7B December 2015 – July 2021 LM53625-Q1 , LM53635-Q1
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
The following characteristics apply only to the circuit of Figure 9-34. These parameters are not tested and represent typical performance only. Unless otherwise stated, the following conditions apply: VIN = 12 V, TA = 25°C. For the purpose of offering meaningful information to the designer, information is included for the application with FPWM pin high (FPWM mode) and FPWM pin low (AUTO mode) although the schematic shows the application running specifically in AUTO mode. The mode is specified under each of the following graphs.
VOUT = 6 V (ADJ part) | FPWM | IOUT = 0 A |
VOUT = 6 V (ADJ part) | FPWM | IOUT = 0 A |
VOUT = 6 V (ADJ part) | FPWM | IOUT = 0 A |
VOUT = 6 V (ADJ part) | FPWM |