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  • LM57 Resistor-Programmable Temperature Switch and Analog Temperature Sensor

    • SNIS152E May   2009  – July 2015 LM57

      PRODUCTION DATA.  

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  • LM57 Resistor-Programmable Temperature Switch and Analog Temperature Sensor
  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics - Accuracy Characteristics - Trip Point Accuracy
    6. 7.6 Electrical Characteristics - Accuracy Characteristics - VTEMP Analog Temperature Sensor Output Accuracy
    7. 7.7 Electrical Characteristics
    8. 7.8 Switching Characteristics
    9. 7.9 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 LM57 VTEMP Temperature-to-Voltage Transfer Function
        1. 8.3.1.1 LM57 VTEMP Voltage-to-Temperature Equations
      2. 8.3.2 RSENSE
      3. 8.3.3 Resistor Selection
      4. 8.3.4 TOVER and TOVER Digital Outputs
        1. 8.3.4.1 TOVER and TOVER Noise Immunity
      5. 8.3.5 Trip Test Digital Input
      6. 8.3.6 VTEMP Analog Temperature Sensor Output
        1. 8.3.6.1 VTEMP Noise Considerations
        2. 8.3.6.2 VTEMP Capacitive Loads
        3. 8.3.6.3 VTEMP Voltage Shift
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 ADC Input Considerations
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Selection of RSENSE Resistors
      3. 9.2.3 Application Curves
      4. 9.2.4 Grounding of the TRIP TEST Pin
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Temperature Considerations
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information
  14. IMPORTANT NOTICE

Package Options

Mechanical Data (Package|Pins)
  • PW|8
    • MPDS568
  • NGR|8
    • MPDS404A
Thermal pad, mechanical data (Package|Pins)
Orderable Information
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  • snis152e_pm
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DATA SHEET

LM57 Resistor-Programmable Temperature Switch and Analog Temperature Sensor

1 Features

  • See LM57-Q1 Data Sheet for AEC-Q100 Grade 1/Grade 0/Grade 0 Extended (Qualified and Manufactured on an Automotive Grade Flow)
  • Trip Temperature Set by External Resistors with
    Accuracy of ±1.7°C or ±2.3°C from −40°C to +150°C
  • Resistor Tolerance Contributes Zero Error
  • Push-Pull and Open-Drain Switch Outputs
  • Wide Operating Temperature Range of −50°C to 150°C
  • Very Linear Analog VTEMP Temp Sensor Output
    with ±0.8°C or ±1.3°C Accuracy from −50°C to +150°C
  • Short-Circuit Protected Analog and Digital Outputs
  • Latching Function for Digital Outputs
  • TRIP-TEST Pin Allows In-System Testing
  • Low Power Minimizes Self-Heating to Under 0.02°C

2 Applications

  • Factory Automation
  • Industrial
  • Automotive
  • Down Hole
  • Avionics
  • Telecom Infrastructure

3 Description

The LM57 device is a precision, dual-output, temperature switch with analog temperature sensor output for wide temperature industrial applications. The trip temperature (TTRIP) is selected from 256 possible values in the range of –40°C to 150°C. The VTEMP is a class AB analog voltage output that is proportional to temperature with a programmable negative temperature coefficient (NTC). Two external 1% resistors set the TTRIP and VTEMP slope. The digital and analog outputs enable protection and monitoring of system thermal events.

Built-in thermal hysteresis (THYST) prevents the digital outputs from oscillating. The TOVER and TOVER digital outputs will assert when the die temperature exceeds TTRIP and will de-assert when the temperature falls below a temperature equal to TTRIP minus THYST.

TOVER is active-high with a push-pull structure. TOVER is active-low with an open-drain structure. Tying TOVER to TRIP-TEST will latch the output after it trips. The output can be cleared by forcing TRIP-TEST low. Driving the TRIP-TEST high will assert the digital outputs. A processor can check the state of TOVER or TOVER, confirming they changed to an active state. This allows for in situ verification that the comparator and output circuitry are functional after system assembly. When TRIP-TEST is high, the trip-level reference voltage appears at the VTEMP pin. The system could then use this voltage to calculate the threshold of the LM57.

Device Information (1)(2)

PART NUMBER PACKAGE BODY SIZE (NOM)
LM57BISD WSON (8) 2.50 mm × 2.50 mm
LM57FPW TSSOP (8) 3.00 mm × 6.40 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.
  2. For device comparison see Device Comparison Table.

LM57 Overtemperature Alarm

LM57 30080576.gif

Temperature Transfer Function

LM57 C101_SNIS152.png

4 Revision History

Changes from D Revision (February 2013) to E Revision

  • Added Pin Configuration and Functions section, ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section Go
  • Added TSSOP Package option throughout data sheetGo

Changes from C Revision (February 2010) to D Revision

  • Changed layout of National Data Sheet to TI formatGo

5 Device Comparison Table

ORDER NUMBER PACKAGE GRADE (TEMP RANGE) VTEMP ACCURACY TRIP POINT ACCURACY HYSTERESIS
LM57BISD-5, LM57BISDX-5 WSON/SD/NGR/DFN (8) Commercial (-50°C to 150°C) ±0.8°C ±1.5°C 5°C
LM57BISD-10, LM57BISDX-10 WSON/SD/NGR/DFN (8) Commercial (-50°C to 150°C) ±0.8°C ±1.5°C 10°C
LM57CISD-5, LM57CISD-5 WSON/SD/NGR/DFN (8) Commercial (-50°C to 150°C) ±1.3°C ±2.3°C 5°C
LM57CISD-10, LM57CISDX-10 WSON/SD/NGR/DFN (8) Commercial (-50°C to 150°C) ±1.3°C ±2.3°C 10°C
LM57FPW, LM57FPWR PW/TSSOP (8) Commercial (-50°C to 150°C) ±1.3°C ±2.3°C 5°C
LM57TPW, LM57TPWR PW/TSSOP (8) Commercial (-50°C to 150°C) ±1.3°C ±2.3°C 10°C
LM57FSPWQ1, LM57FSPWRQ1(1) PW/TSSOP (8) Automotive Grade 0 Extended (-50°C to 160°C) ±1.3°C ±2.3°C 5°C
LM57TSPWQ1, LM57TSPWRQ1(1) PW/TSSOP (8) Automotive Grade 0 Extended (-50°C to 160°C) ±1.3°C ±2.3°C 10°C
LM57FEPWQ1, LM57FEPWRQ1(1) PW/TSSOP (8) Automotive Grade 0 Standard (-50°C to 150°C) ±1.3°C ±2.3°C 5°C
LM57TEPWQ1, LM57TEPWRQ1(1) PW/TSSOP (8) Automotive Grade 0 Standard (-50°C to 150°C) ±1.3°C ±2.3°C 10°C
LM57FQPWQ1, LM57FQPWRQ1(1) PW/TSSOP (8) Automotive Grade 1 Standard (-50°C to 125°C) ±1.3°C ±2.3°C 5°C
LM57TQPWQ1, LM57TQPWRQ1(1) PW/TSSOP (8) Automotive Grade 1 Standard (-50°C to 125°C) ±1.3°C ±2.3°C 10°C
(1) For Automotive grade device complete datasheet see LM57-Q1.

6 Pin Configuration and Functions

TSSOP/PW and WSON/SD/NGR/DFN Packages
8-Pin
Top View
LM57 30080501.gif

Pin Functions

PIN TYPE EQUIVALENT CIRCUIT DESCRIPTION
NAME NO.
GND 1 Ground — Power supply ground
SENSE1 2 — LM57 SNIS188_RSENSE_ESD.gif Trip-point resistor sense. One of two sense pins which selects the temperature at which TOVER and TOVER will assert.
SENSE2 3 — LM57 SNIS188_RSENSE_ESD.gif Trip-point resistor sense. One of two sense pins which selects the temperature at which TOVER and TOVER will assert.
VDD 4 Power Supply voltage
TRIP
TEST		 5 Digital Input LM57 30080538.gif TRIP TEST pin. Active High input.
If TRIP TEST = 0 (default), then the VTEMP output has the analog temperature sensor output voltage.
If TRIP TEST = 1, then TOVER and TOVER outputs are asserted and VTEMP = VTRIP, the temperature trip voltage.
Tie this pin to ground if not used.
TOVER 6 Digital Output LM57 30080521.gif Overtemperature switch output
Active low, open-drain (see LM57 VTEMP Voltage-to-Temperature Equations regarding required pullup resistor.)
Asserted when the measured temperature exceeds the Trip Point Temperature or if TRIP TEST = 1
This pin may be left open if not used.
TOVER 7 Digital Output LM57 30080520.gif Overtemperature switch output
Active high, push-pull
Asserted when the measured temperature exceeds the trip point temperature or if TRIP TEST = 1
This pin may be left open if not used.
VTEMP 8 Analog Output LM57 30080539.gif VTEMP analog voltage output
If TRIP TEST = 0, then VTEMP = VTS, temperature sensor output voltage
If TRIP TEST = 1, then VTEMP = VTRIP, temperature trip voltage
This pin may be left open if not used.
Thermal Pad (WSON package only) — — — Connected to GND

7 Specifications

7.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted) (1)(2)
MIN MAX UNIT
Supply voltage −0.3 6 V
Voltage at TOVER −0.3 6 V
Voltage at TOVER , VTEMP, TRIP-TEST, SENSE1, and SENSE2 −0.3 (VDD + 0.3 V) V
Current at any pin 5 mA
Storage temperature −65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) Soldering process must comply with Reflow Temperature Profile specifications. Refer to www.ti.com/packaging.

7.2 ESD Ratings

VALUE UNIT
LM57BISD and LM57CISD in WSON package
V(ESD) Electrostatic discharge (1) Human body model (HBM) ±5500 V
Charged-device model (CDM) ±1250
Machine Model (MM) ±450
LM57FPW and LM57TPW in TSSOP package
V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001 (2) ±2000 V
Charged-device model (CDM), per JEDEC specification JESD22-C101 (3) ±750
(1) The Human Body Model (HBM) is a 100-pF capacitor charged to the specified voltage then discharged through a 1.5-kΩ resistor into each pin. The Machine Model (MM) is a 200 pF capacitor charged to the specified voltage then discharged directly into each pin. The Charged Device Model (CDM) is a specified circuit characterizing an ESD event that occurs when a device acquires charge through some triboelectric (frictional) or electrostatic induction processes and then abruptly touches a grounded object or surface.
(2) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(3) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

7.3 Recommended Operating Conditions

MIN NOM MAX UNIT
Supply voltage 2.4 5.5 V
Free air temperature range (TMIN ≤ TA ≤ TMAX) −50 150 °C

7.4 Thermal Information

THERMAL METRIC (1) LM57 UNIT
NGR (WSON/SD) PW (TSSOP)
8 PINS 8 PINS
RθJA Junction-to-ambient thermal resistance 71.3 183 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 82.8 66 °C/W
RθJB Junction-to-board thermal resistance 43.4 111 °C/W
ψJT Junction-to-top characterization parameter 2.2 8 °C/W
ψJB Junction-to-board characterization parameter 43.7 110 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance 11.9 — °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

7.5 Electrical Characteristics - Accuracy Characteristics – Trip Point Accuracy

PARAMETER TEST CONDITIONS LM57B LM57C, LM57F or LM57T UNIT
MIN TYP MAX MIN TYP MAX
Trip Point Accuracy
(Includes 1% set-resistor tolerance) (1)		 J2 TA = −41°C to 52°C VDD = 2.4 V to 5.5 V ±1.5 ±2.3 °C
J3 TA = 52°C to 97°C VDD = 2.4 V to 5.5 V ±1.5 ±2.3 °C
J4 TA = 97°C to 119°C VDD = 2.4 V to 5.5 V ±1.5 ±2.3 °C
J5 TA = 119°C to free air temperature max VDD = 2.4 V to 5.5 V ±1.5 ±2.3 °C
(1) Accuracy is defined as the error between the measured and reference output voltages, tabulated in the Conversion Table at the specified conditions of supply gain setting, voltage, and temperature (expressed in °C). Accuracy limits include line regulation within the specified conditions. Accuracy limits do not include load regulation; they assume no DC load.

7.6 Electrical Characteristics - Accuracy Characteristics – VTEMP Analog Temperature Sensor Output Accuracy

These limits do not include DC load regulation. These stated accuracy limits are with reference to the values in Table 1.
PARAMETER TEST CONDITIONS LM57B LM57C, LM57F or LM57T UNIT
MIN TYP MAX MIN TYP MAX
VTEMP Accuracy
(These stated accuracy limits are with reference to the values in Table 1, LM57 VTEMP Temperature-to-Voltage.) (1)		 J2 TA = −50°C to free air temperature max VDD = 2.4 V to 5.5 V ±0.95 ±1.3 °C
J3 TA = −50°C to free air temperature max VDD = 2.4 V to 5.5 V ±0.8 ±1.3 °C
J4 TA = 20°C to 50°C VDD = 2.4 V to 5.5 V ±0.7 ±1.3 °C
TA = 0°C to free air temperature max VDD = 2.7 V to 5.5 V ±0.7 ±1.3
TA = −50°C to 0°C VDD = 3.1 V to 5.5 V ±0.8 ±1.3
J5 TA = 60°C to free air temperature max VDD = 2.4 V to 5.5 V ±0.7 ±1.3 °C
TA = 20°C to 50°C VDD = 2.9 V to 5.5 V ±0.7 ±1.3
TA = 0°C to free air temperature max VDD = 3.2 V to 5.5 V ±0.7 ±1.3
TA = −50°C to 0°C VDD = 4 V to 5.5 V ±0.8 ±1.3
(1) Accuracy is defined as the error between the measured and reference output voltages, tabulated in the Conversion Table at the specified conditions of supply gain setting, voltage, and temperature (expressed in °C). Accuracy limits include line regulation within the specified conditions. Accuracy limits do not include load regulation; they assume no DC load.

7.7 Electrical Characteristics

Unless otherwise noted, these specifications apply for VDD = 2.4 to 5.5 V. Limits apply over free air temperature range.
PARAMETER TEST CONDITIONS MIN (2) TYP (1) MAX (2) UNIT
TEMPERATURE SENSOR
VTEMP sensor gain J2: −50°C to 52°C −5.166 mV/°C
J3: 52°C to 97°C −7.752
J4: 97°C to 119°C −10.339
J5: 119°C to 150°C −12.924
Line regulation DC: supply-to-VTEMP(3) VDD = 2.4 V to 5.5 V
Temp = 90°C		 0.18 mV
58 μV/V
−84 dB
Load regulation: VTEMP output (6) Source ≤ 240 µA, (VDD – VTEMP) ≥ 200 mV; TA = −50°C to 150°C −1 mV
Sink ≤ 300 µA, VTEMP ≥ 360 mV; TA = −50°C to 150°C 1
Source or sink = 100 µA; TA = −50°C to 150°C 1 Ω
Maximum Load capacitance: VTEMP output No output series resistor required; (See VTEMP Capacitive Loads) 1100 pF
IS Supply current: quiescent (4) 24 28 µA
TRIP-TEST INPUT
VIH Logic 1 threshold voltage VDD – 0.5 V
VIL Logic 0 threshold voltage 0.5 V
IIH Logic 1 input current 1.4 3 µA
IIL Logic 0 input leakage current (5) TA = −50°C to 150°C 0.001 1 µA
TOVER (PUSH-PULL, ACTIVE-HIGH) OUTPUT
VOH Logic 1 push-pull output voltage Source ≤ 600 µA VDD – 0.2 V
Source ≤ 1.2 mA VDD – 0.45
VOL Logic 0 output voltage Sink ≤ 600 µA 0.2 V
Sink ≤ 1.2 mA 0.45
TOVER (OPEN-DRAIN, ACTIVE-LOW) OUTPUT
VOL Logic 0 output voltage Sink ≤ 600 µA 0.2 V
Sink ≤1.2 mA 0.45
IOH Logic 1 output leakage current (5) Temperature = 30°C; 0.001 1 µA
HYSTERESIS
THYST Hysteresis temperature 5°C hysteresis option (for all LM57F or LM57-5) 4.7 5 5.4 °C
10°C hysteresis option (for all LM57T or LM57-10) 9.6 10 10.6 °C
(1) Typicals are at TJ = TA = 25°C and represent most likely parametric norm.
(2) Limits are specified to TI's average outgoing quality level (AOQL).
(3) Line regulation (DC) is calculated by subtracting the output voltage at the highest supply voltage from the output voltage at the lowest supply voltage. The typical DC line regulation specification does not include the output voltage shift discussed in VTEMP Voltage Shift.
(4) Supply current refers to the quiescent current of the LM57 only and does not include any load current
(5) This current is leakage current only and is therefore highest at high temperatures. Prototype test indicate that the leakage is well below 1 μA over the full temperature range. This 1 μA specification reflects the limitations of measuring leakage at room temperature. For this reason only, the leakage current is not specified at a lower value.
(6) Source currents are flowing out of the LM57. Sink currents are flowing into the LM57. Load Regulation is calculated by measuring VTEMP at 0 μA and subtracting the value with the conditions specified.

7.8 Switching Characteristics

Unless otherwise noted, these specifications apply for VDD = 2.4 to 5.5 V over the free air temperature range.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tEN Maximum time from power on to digital output enabled 1.5 2.9 ms
tVTEMP Maximum time from power on to analog temperature (VTEMP) valid 1.5 2.9 ms
LM57 30080550.gifFigure 1. Definition of tEN
LM57 30080551.gifFigure 2. Definition of tVTEMP

7.9 Typical Characteristics

LM57 30080569.gif
Figure 3. Supply Current vs Supply Voltage
LM57 30080567.gif
Figure 5. Load Regulation: Change In VTEMP vs Source Current Overhead Is Vdd-Vtemp
LM57 30080572.gif
Figure 7. Line Regulation: VTEMP vs Supply Voltage
LM57 30080525.gif
Figure 9. Start-Up Response
LM57 C102_SNIS152.png
Conditions: J2, VDD=5V
Figure 11. J2 Accuracy Specification Over Temperature
LM57 30080570.gif
Figure 4. Supply Current vs Temperature
LM57 30080568.gif
Figure 6. Load Regulation: Change In VTEMP vs Sink Current
LM57 30080526.gif
Figure 8. Line Regulation: Hysteresis vs Supply Voltage 30°C
LM57 30080527.gif
Figure 10. Hysteresis vs Temperature

 
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