SNOS792E May   1999  – December 2024 LM6172

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics ±15V
    6. 5.6 Electrical Characteristics ±5V
    7. 5.7 Typical Characteristics: D (SOIC, 8) Package
    8. 5.8 Typical Characteristics: P (PDIP, 8) Package
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Slew Rate
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Circuit Operation
      2. 7.1.2 Reduce Settling Time
      3. 7.1.3 Drive Capacitive Loads
      4. 7.1.4 Compensation for Input Capacitance
      5. 7.1.5 Termination
    2. 7.2 Typical Application
      1. 7.2.1 Application Circuits
    3. 7.3 Power Supply Recommendations
      1. 7.3.1 Power Supply Bypassing
      2. 7.3.2 Power Dissipation
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
        1. 7.4.1.1 Printed Circuit Boards and High-Speed Op Amps
        2. 7.4.1.2 Using Probes
        3. 7.4.1.3 Components Selection and Feedback Resistor
  9. 8 Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
    2. 8.2 Support Resources
    3. 8.3 Trademarks
    4. 8.4 Electrostatic Discharge Caution
    5. 8.5 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|8
  • P|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.5 Electrical Characteristics ±15V

at TJ = 25°C, VCC+ = 15V, VCC– = −15V, VCM = 0V, and RL = 1kΩ (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN(2) TYP(1) MAX(2) UNIT
VOS Input offset voltage 0.4 3 mV
TA = –40°C to +85°C 4
TCVOS Input offset voltage average drift 6 μV/°C
IB Input bias current 1.2 3 μA
TA = –40°C to +85°C 4
IOS Input offset current 0.02 2 μA
TA = –40°C to +85°C 3
RIN Input resistance Common-mode 40 MΩ
Differential-mode 4.9
RO Open-loop output resistance 14 Ω
CMRR Common-mode rejection ratio VCM = ±10V 70 110 dB
TA = –40°C to +85°C 65
PSRR Power supply rejection ratio VS = ±15V to ±5V 75 95 dB
TA = –40°C to +85°C 70
VCM Input common-mode voltage CMRR > 60dB ±13.5 V
AV Large-signal voltage gain(3) RL = 1kΩ,
VOUT = ±5V		 80 86 dB
TA = –40°C to +85°C 75
RL = 100Ω,
VOUT = ±5V		 65 78
TA = –40°C to +85°C 60
VO Output swing RL = 1kΩ, sourcing 12.5 13.2 V
TA = –40°C to +85°C 12
RL = 1kΩ, sinking −13.1 −12.5
TA = –40°C to +85°C −12
RL = 100Ω, sourcing 6 9
TA = –40°C to +85°C 5
RL = 100Ω, sinking −8.5
−6
TA = –40°C to +85°C
−5
Continuous output current (open loop)(4) Sourcing,
RL = 100Ω		 60 90 mA
TA = –40°C to +85°C 50
Sinking,
RL = 100Ω		 −85 −60
TA = –40°C to +85°C −50
ISC Output short-circuit current D package Sourcing 173 mA
Sinking −183
P package Sourcing 107
Sinking −105
IS Supply current 4.6 8 mA
TA = –40°C to +85°C 9
SR Slew rate(5) AV = +2, VIN = 13VPP 3000 V/μs
AV = +2, VIN = 10VPP 2500
Unity-gain bandwidth D package 80 MHz
P package 100
−3dB frequency AV = +1 160 MHz
AV = +2 62 MHz
φm Phase margin 40 Deg
Bandwidth matching between channels 2 MHz
ts Settling time (0.1%) AV = −1, VOUT = ±5V, RL = 500Ω 65 ns
AD Differential gain(6) 0.28 %
φD Differential phase(6) 0.6 °
en Input-referred voltage noise f = 10kHz 12 nV/√Hz
in Input-referred current noise f = 10kHz  1 pA/√Hz
HD2 Second harmonic distortion D package fIN = 10kHz −88 dBc
fIN = 5MHz −50
P package fIN = 10kHz −110
fIN = 5MHz −50
HD3 Third harmonic distortion D package fIN = 10kHz −93 dBc
fIN = 5MHz −41
P package fIN = 10kHz −105
fIN = 5MHz −50
(1) Typical values represent the most likely parametric norm.
(2) All limits are specified by testing or statistical analysis.
(3) Large-signal voltage gain is the total output swing divided by the input signal required to produce that swing. For VS = ±15V,
VOUT = ±5V. For VS = 5V, VOUT = ±1V.
(4) The open-loop output current is the output swing with the 100Ω load resistor divided by that resistor.
(5) Slew rate is the average of the rising and falling slew rates.
(6) Differential gain and phase are measured with AV = +2, VIN = 1VPP at 3.58MHz and both input and output 75Ω terminated.