SNAS207B May   2004  – January 2024 LM64

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 Operating Ratings
    3. 5.3 DC Electrical Characteristics
    4. 5.4 Operating Electrical Characteristics
    5. 5.5 AC Electrical Characteristics
    6. 5.6 Digital Electrical Characteristics
    7. 5.7 SMBus Logical Electrical Characteristics
    8. 5.8 SMBus Digital Switching Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1  Conversion Sequence
      2. 6.3.2  The ALERT Output
        1. 6.3.2.1 ALERT Output as a Temperature Comparator
        2. 6.3.2.2 ALERT Output as an Interrupt
        3. 6.3.2.3 ALERT Output as an SMBus ALERT
      3. 6.3.3  SMBus Interface
      4. 6.3.4  Power-On Reset (POR) Default States
      5. 6.3.5  Temperature Data Format
      6. 6.3.6  Open-Drain Outputs, Inputs, and Pull-Up Resistors
      7. 6.3.7  Diode Fault Detection
      8. 6.3.8  Communicating with the LM64
      9. 6.3.9  Digital Filter
      10. 6.3.10 Fault Queue
      11. 6.3.11 One-Shot Register
      12. 6.3.12 Serial Interface Reset
  8. 7 Registers
    1. 7.1 LM64 Registers
      1. 7.1.1 LM64 Register Map in Hexadecimal Order
      2. 7.1.2 LM64 Register Map in Functional Order
      3. 7.1.3 LM64 Initial Register Sequence and Register Descriptions in Functional Order
        1. 7.1.3.1 LM64 Required Initial Fan Control Register Sequence
      4. 7.1.4 LM64 Register Descriptions in Functional Order
        1. 7.1.4.1 Fan Control Registers
        2. 7.1.4.2 Configuration Register
        3. 7.1.4.3 Tachometer Count And Limit Registers
        4. 7.1.4.4 Local Temperature And Local High Setpoint Registers
        5. 7.1.4.5 Remote Diode Temperature, Offset And Setpoint Registers
        6. 7.1.4.6 ALERT Status And Mask Registers
        7. 7.1.4.7 Conversion Rate And One-Shot Registers
        8. 7.1.4.8 ID Registers
    2. 7.2 General Purpose Registers
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Fan Control Duty Cycle VS. Register Settings and Frequency
        1. 8.1.1.1 Computing Duty Cycles for a Given Frequency
      2. 8.1.2 Use of the Lookup Table for Non-Linear PWM Values VS Temperature
      3. 8.1.3 NON-Ideality Factor and Temperature Accuracy
        1. 8.1.3.1 Diode Non_Ideality
        2. 8.1.3.2 Compensating for Diode Non-Ideality
      4. 8.1.4 Computing RPM of the Fan from the TACH Count
    2. 8.2 Typical Application
  10. 9 Layout
    1. 9.1 PCB Layout for Minimizing Noise
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.1.2 LM64 Register Map in Functional Order

The following is a Register Map grouped in Functional Order. Some address locations have been left blank to maintain compatibility with LM86. Addresses in parenthesis are mirrors of named address. Reading or writing either address will access the same 8-bit register. The Fan Control and Configuration Registers are listed first, as there is a required order to setup these registers first and then setup the others. The detailed explanations of each register will follow the order shown below. POR = Power-On-Reset.

Register
[HEX]		Register NameRead/WritePOR Default
[HEX]
FAN CONTROL REGISTERS
4APWM and RPMR/W20
4BFan Spin-Up ConfigurationR/W3F
4DPWM FrequencyR/W17
4CPWM ValueRead Only
(R/W if Override Bit is Set)		00
50–5FLookup TableR/WSee Table
4FLookup Table HysteresisR/W04
CONFIGURATION REGISTER
03 (09)ConfigurationR/W00
TACHOMETER COUNT AND LIMIT REGISTERS
46Tach Count LSBRead OnlyN/A
47Tach Count MSBRead OnlyN/A
48Tach Limit LSBR/WFF
49Tach Limit MSBR/WFF
LOCAL TEMPERATURE AND LOCAL SETPOINT REGISTERS
00Local TemperatureRead OnlyN/A
05 (0B)Local High SetpointR/W46 (70°)
REMOTE DIODE TEMPERATURE AND SETPOINT REGISTERS
01Remote Temperature MSBRead OnlyN/A
10Remote Temperature LSBRead OnlyN/A
11Remote Temperature Offset MSBR/W00
12Remote Temperature Offset LSBR/W00
07 (0D)Remote High Setpoint MSBR/W46 (70°C)
13Remote High Setpoint LSBR/W00
08 (0E)Remote Low Setpoint MSBR/W00 (0°C)
14Remote Low Setpoint LSBR/W00
19Remote TCRIT SetpointR/W55 (85°C)
21Remote TCRIT HysR/W0A (10°C)
BFRemote Diode Temperature FilterR/W00
CONVERSION AND ONE-SHOT REGISTERS
04 (0A)Conversion RateR/W08
0FOne-ShotWrite OnlyN/A
ALERT STATUS AND MASK REGISTERS
02ALERT StatusRead OnlyN/A
16ALERT MaskR/WA4
ID REGISTERS
FEManufacturer's IDRead Only01
FFStepping/Die Rev. IDRead Only51
GENERAL PURPOSE REGISTERS
1AGeneral Purpose InputRead OnlySee (1)
1BGeneral Purpose OutputR/WSee (2)
[RESERVED] REGISTERS—NOT USED
06Not UsedN/AN/A
0CNot UsedN/AN/A
15Not UsedN/AN/A
17Not UsedN/AN/A
18Not UsedN/AN/A
1C–1FNot UsedN/AN/A
20Not UsedN/AN/A
22–2FNot UsedN/AN/A
30–3FNot UsedN/AN/A
40–45Not UsedN/AN/A
4ENot UsedN/AN/A
60–BENot UsedN/AN/A
C0–FDNot UsedN/AN/A
(1) For Register 0x1A the Power-On-Reset for the five LSB's are the logic states present on the 5 GPIOx pins.
(2) For Register 0x1B the Power-On-Reset for the five LSB's are the logic states present on the 5 GPDx pins.