SNAS207B May 2004 – January 2024 LM64
PRODUCTION DATA
ADDRESS Hex | Read/ Write | Bits | POR Value | Name | Description |
---|---|---|---|---|---|
03 (09)HEX CONFIGURATION REGISTER | |||||
03 (09) | R/W | 7 | 0 | ALERT Mask | When this bit is a 0, ALERT interrupts are enabled. When this bit is set to a 1, ALERT interrupts are masked, and the ALERT pin is always in a high impedance (open) state. |
6 | 0 | STANDBY | When this bit is a 0, the LM64 is in operational mode, converting, comparing, and updating the PWM output continuously. When this bit is a 1, the LM64 enters a low power standby mode. In STANDBY, continuous conversions are stopped, but a conversion/comparison cycle may be initiated by writing any value to register 0x0F. Operation of the PWM output in STANDBY depends on the setting of bit 5 in this register. | ||
5 | 0 | PWM Disable in STANDBY | When this bit is a 0, the LM64’s PWM output continues to output the current fan control signal while in STANDBY. When this bit is a 1, the PWM output is disabled (as defined by the PWM polarity bit) while in STANDBY. | ||
4:1 | 0000 | These bits are unused and always set to 0. | |||
0 | 0 | RDTS Fault Queue | 0: an ALERT will be generated if any Remote Diode conversion result is above the Remote High Set Point or below the Remote Low Setpoint. 1: an ALERT will be generated only if three consecutive Remote Diode conversions are above the Remote High Set Point or below the Remote Low Setpoint. |