SNOS760D May   1999  – February 2024 LM7171

PRODUCTION DATA  

  1.   1
  2. 1Features
  3. 2Applications
  4. 3Description
  5. 4Pin Configuration and Functions
  6. 5Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics: ±15V
    6. 5.6 Electrical Characteristics: ±5V
    7. 5.7 Typical Characteristics: LM7171A
    8. 5.8 Typical Characteristics: LM7171B
  7. 6Application and Implementation
    1. 6.1 Application Information
      1. 6.1.1 Circuit Operation
      2. 6.1.2 Slew Rate Characteristic
        1. 6.1.2.1 Slew-Rate Limitation
      3. 6.1.3 Compensation for Input Capacitance
    2. 6.2 Typical Applications
    3. 6.3 Power Supply Recommendations
      1. 6.3.1 Power-Supply Bypassing
      2. 6.3.2 Termination
      3. 6.3.3 Driving Capacitive Loads
      4. 6.3.4 Power Dissipation
    4. 6.4 Layout
      1. 6.4.1 Layout Guidelines
        1. 6.4.1.1 Printed Circuit Board and High-Speed Op Amps
        2. 6.4.1.2 Using Probes
        3. 6.4.1.3 Component Selection and Feedback Resistor
  8. 7Device and Documentation Support
    1. 7.1 Receiving Notification of Documentation Updates
    2. 7.2 Support Resources
    3. 7.3 Trademarks
    4. 7.4 Electrostatic Discharge Caution
    5. 7.5 Glossary
  9. 8Revision History
  10. 9Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|8
  • P|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.4 Thermal Information

THERMAL METRIC(1) LM7171 UNIT
D (SOIC) A Version D (SOIC) B Version P (PDIP)
8 PINS 8 PINS 8 PINS
RθJA Junction-to-ambient thermal resistance 122.5 172 108 ℃/W
RθJC(top) Junction-to-case (top) thermal resistance 64.7 62.4 52.4 ℃/W
RθJB Junction-to-board thermal resistance 65.9 55.7 51.9 ℃/W
ΨJT Junction-to-top characterization parameter 17.6 16.5 6.8 ℃/W
ΨJB Junction-to-board characterization parameter 65.1 55.1 51.1 ℃/W
RθJC(bot) Junction-to-case (bottom) thermal resistance N/A N/A N/A ℃/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.