SNOSDC0A October   2020  – December 2020 LM7310

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Switching Characteristics
    8.     14
    9. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Input Reverse Polarity Protection
      2. 7.3.2 Undervoltage Protection (UVLO & UVP)
      3. 7.3.3 Overvoltage Lockout (OVLO)
      4. 7.3.4 Inrush Current control and Fast-trip
        1. 7.3.4.1 Slew Rate (dVdt) and Inrush Current Control
        2. 7.3.4.2 Fast-Trip During Steady State
      5. 7.3.5 Analog Load Current Monitor Output
      6. 7.3.6 Reverse Current Protection
      7. 7.3.7 Overtemperature Protection (OTP)
      8. 7.3.8 Fault Response
      9. 7.3.9 Power Good Indication (PG)
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Single Device, Self-Controlled
      1. 8.2.1 Typical Application
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Setting Undervoltage and Overvoltage Thresholds
          2. 8.2.1.2.2 Setting Output Voltage Rise Time (tR)
          3. 8.2.1.2.3 Setting Power Good Assertion Threshold
          4. 8.2.1.2.4 Setting Analog Current Monitor Voltage (IMON) Range
        3. 8.2.1.3 Application Curves
    3. 8.3 Active ORing
    4. 8.4 Priority Power MUXing
    5. 8.5 USB PD Port Protection
    6. 8.6 Parallel Operation
  9. 9 Power Supply Recommendations
    1. 9.1 Transient Protection
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)
Parameter Pin MIN MAX UNIT
VIN Maximum Input Voltage Range, –40 ℃ ≤ TJ ≤ 125 ℃ IN max (–15, VOUT - 21) 28 V
Maximum Input Voltage Range, –10 ℃ ≤ TJ ≤ 125 ℃ max (–15, VOUT - 22) 28 V
VOUT Maximum Output Voltage Range, –40 ℃ ≤ TJ ≤ 125 ℃ OUT –0.3 min (28, VIN + 21)
Maximum Output Voltage Range, –10 ℃ ≤ TJ ≤ 125 ℃ –0.3 min (28, VIN + 22)
VOUT,PLS Minimum Output Voltage Pulse (< 1 µs) OUT –0.8
VEN/UVLO Maximum Enable Pin Voltage Range (2) EN/UVLO –0.3 6.5 V
VOVLO Maximum OVLO Pin Voltage Range (2) OVLO –0.3 6.5 V
VdVdT Maximum dVdT Pin Voltage Range dVdt Internally Limited V
VPGTH Maximum PGTH Pin Voltage Range (2) PGTH –0.3 6.5 V
VPG Maximum PG Pin Voltage Range PG –0.3 6.5 V
VIMON Maximum IMON Pin Voltage Range IMON 1.8 V
IMAX Maximum Continuous Switch Current IN to OUT 5.5 A
TJ Junction temperature Internally Limited °C
TLEAD Maximum Lead Temperature 300 °C
TSTG Storage temperature –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Rating may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Condition. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) If this pin has a pull-up up to VIN, it is recommended to use a resistance of 350 kΩ or higher to limit the current under conditions where IN can be exposed to reverse polarity.