SNOSC25D
May 1998 – October 2015
LM741
PRODUCTION DATA.
1
Features
2
Applications
3
Description
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics, LM741
6.6
Electrical Characteristics, LM741A
6.7
Electrical Characteristics, LM741C
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Overload Protection
7.3.2
Latch-up Prevention
7.3.3
Pin-to-Pin Capability
7.4
Device Functional Modes
7.4.1
Open-Loop Amplifier
7.4.2
Closed-Loop Amplifier
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.3
Application Curve
9
Power Supply Recommendations
10
Layout
10.1
Layout Guidelines
10.2
Layout Example
11
Device and Documentation Support
11.1
Community Resources
11.2
Trademarks
11.3
Electrostatic Discharge Caution
11.4
Glossary
12
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
YS|0
P|8
MPDI001B
Thermal pad, mechanical data (Package|Pins)
Orderable Information
snosc25d_oa
snosc25d_pm
5 Pin Configuration and Functions
LMC Package
8-Pin TO-99
Top View
LM741H is available per JM38510/10101
NAB Package
8-Pin CDIP or PDIP
Top View
Pin Functions
PIN
I/O
DESCRIPTION
NAME
NO.
INVERTING INPUT
2
I
Inverting signal input
NC
8
N/A
No Connect, should be left floating
NONINVERTING INPUT
3
I
Noninverting signal input
OFFSET NULL
1, 5
I
Offset null pin used to eliminate the offset voltage and balance the input voltages.
OFFSET NULL
OUTPUT
6
O
Amplified signal output
V+
7
I
Positive supply voltage
V–
4
I
Negative supply voltage