SLVSFD0 September   2019 LM74202-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Simplified Schematic
      2.      ISO16750-2 Load Dump Pulse 5b Performance at 12 V
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1      Absolute Maximum Ratings
    2. 6.2      ESD Ratings
    3. 6.3      Recommended Operating Conditions
    4. Table 1. Thermal Information
    5. 6.4      Electrical Characteristics
    6. 6.5      Timing Requirements
    7. 6.6      Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Undervoltage Lockout (UVLO)
      2. 8.3.2 Overvoltage Protection (OVP)
      3. 8.3.3 Reverse Battery Protection
      4. 8.3.4 Hot Plug-In and In-Rush Current Control
      5. 8.3.5 Overload and Short Circuit Protection
        1. 8.3.5.1 Overload Protection
          1. 8.3.5.1.1 Active Current Limiting
          2. 8.3.5.1.2 Electronic Circuit Breaker with Overload Timeout, MODE = OPEN
        2. 8.3.5.2 Short Circuit Protection
          1. 8.3.5.2.1 Start-Up With Short-Circuit On Output
        3. 8.3.5.3 FAULT Response
          1. 8.3.5.3.1 Look Ahead Overload Current Fault Indicator
        4. 8.3.5.4 Current Monitoring
        5. 8.3.5.5 IN, OUT, RTN and GND Pins
        6. 8.3.5.6 Thermal Shutdown
        7. 8.3.5.7 Low Current Shutdown Control (SHDN)
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Step by Step Design Procedure
        2. 9.2.2.2 Setting Undervoltage Lockout and Overvoltage Set Point for Operating Voltage Range
        3. 9.2.2.3 Programming the Current-Limit Threshold—R(ILIM) Selection
        4. 9.2.2.4 Programming Current Monitoring Resistor—RIMON
        5. 9.2.2.5 Limiting the Inrush Current
          1. 9.2.2.5.1 Selection of Input TVS for Transient Protection
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
    1. 10.1 Transient Protection
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Pin Configuration and Functions

PWP Package
16-Pin HTSSOP With Exposed Thermal Pad
Top View
LM74202-Q1 Pinout_01_TPS26600_SLVSDG2.gif

Pin Functions

PIN TYPE DESCRIPTION
NO. NAME
1, 2 IN P Input supply voltage. See IN, OUT, RTN and GND Pins section.
3 UVLO I Input for setting the programmable Undervoltage Lockout threshold. An undervoltage event turns off the internal FET and asserts FLT to indicate power failure. If the Undervoltage Lockout function is not needed, the UVLO terminal must be connected to the IN terminal. See Undervoltage Lockout (UVLO) section.
4, 13 NC — No internal connection. These pins can be connected to RTN for enhanced thermal performance.
5 OVP I Input for setting the programmable Overvoltage Protection threshold. An overvoltage event turns off the internal FET and asserts FLT to indicate the overvoltage fault. See Overvoltage Protection (OVP) section.
6 MODE I Mode selection pin for overload fault response. See the Device Functional Modes section.
7 SHDN I Shutdown pin. Pulling SHDN low enters the device into low-power shutdown mode. Cycling SHDN pin voltage resets the device that has latched off due to a fault condition. See Low Current Shutdown Control (SHDN) section.
8 RTN — Reference for device internal control circuits. If reverse input polarity protection is not required, this pin can be connected to GND. See IN, OUT, RTN and GND Pins section.
9 GND — Connect GND to system ground. See IN, OUT, RTN and GND Pins section.
10 IMON O Analog current monitor output. This pin sources a scaled down ratio of current through the internal FET. A resistor from this pin to RTN converts current to proportional voltage. If pin is unused, leave pin floating. See Current Monitoring section.
11 ILIM I/O A resistor from this pin to RTN sets the overload and short-circuit current limit. See the Overload and Short Circuit Protection section.
12 dVdT I/O A capacitor from this pin to RTN sets output voltage slew rate. See the Hot Plug-In and In-Rush Current Control section.
14 FLT O Fault event indicator. Indicator is an open drain output. If indicator is unused, leave indicator floating. See FAULT Response section.
15,16 OUT P Power output of the device. See IN, OUT, RTN and GND Pins section.
PowerPAD — PowerPAD integrated circuit package must be connected to RTN plane on PCB using multiple vias for enhanced thermal performance. PowerPAD is not internally connected to RTN. Do not use the PowerPAD as the only electrical connection to RTN.