SNOSCZ1B July   2015  – June 2016 LM74610-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 During T0
      2. 7.3.2 During T1
      3. 7.3.3 Pin Operation
        1. 7.3.3.1 Anode and Cathode Pins
        2. 7.3.3.2 VcapH and VcapL Pins
        3. 7.3.3.3 Gate Drive Pin
        4. 7.3.3.4 Gate Pull Down Pin
    4. 7.4 Device Functional Modes
      1. 7.4.1 Duty Cycle Calculation
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Design Considerations
        2. 8.2.2.2 Startup Voltage
        3. 8.2.2.3 Capacitor Selection
        4. 8.2.2.4 MOSFET Selection
      3. 8.2.3 Application Curves
      4. 8.2.4 Selection of TVS Diodes in Automotive Reverse Polarity Applications
      5. 8.2.5 OR-ing Application Configuration
      6. 8.2.6 Design Requirements
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Community Resources
    2. 11.2 Trademarks
    3. 11.3 Electrostatic Discharge Caution
    4. 11.4 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

10 Layout

10.1 Layout Guidelines

  • The VIN terminal is recommended to have a low-ESR ceramic bypass-capacitor. The typical recommended bypass capacitance is a 10-μF ceramic capacitor with a X5R or X7R dielectric.
  • The VIN terminal must be tied to the source of the MOSFET using a thick trace or polygon.
  • The Anode pin of the LM74610-Q1 is connected to the Source of the MOSFET for sensing.
  • The Cathode pin of the LM74610-Q1 is connected to the drain of the MOSFET for sensing.
  • The high current path of for this solution is through the MOSFET, therefor it is important to use thick traces for source and drain of the MOSFET.
  • The charge pump capacitor Vcap must be kept away from the MOSFET to lower the thermal effects on the capacitance value.
  • The Gate Drive and Gate pull down pins of the LM74610-Q1 must be connected to the MOSFET gate without using vias. Avoid excessively thin traces to the Gate Drive.
  • Obtaining acceptable performance with alternate layout schemes is possible, however this layout has been shown to produce good results and is intended as a guideline.
  • Keep the Drive pin close to the MOSFET to avoid further reduce MOSFET turn-on delay.

10.2 Layout Example

LM74610-Q1 layout_example_snoscz1.gif Figure 23. Layout Example