SNOSDF8 December   2024 LM74680

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
    7. 5.7 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Input and Output Voltage
      2. 7.3.2 Charge Pump
      3. 7.3.3 Gate Drivers
      4. 7.3.4 Enable
    4. 7.4 Device Functional Modes
      1. 7.4.1 Conduction Mode
        1. 7.4.1.1 Regulated Conduction Mode
        2. 7.4.1.2 Full Conduction Mode
      2. 7.4.2 Reverse Current Protection Mode
  9. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Design Considerations
        2. 8.2.2.2 MOSFET Selection
        3. 8.2.2.3 Output Capacitance
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
      1. 8.3.1 Transient Protection
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)

Layout Guidelines

  • Place the decoupling capacitor close to the OUTP pin and IC GND.
  • For the top side MOSFETs, connect the INx, TGx, and OUTP pins of LM74680 close to the MOSFET SOURCE, GATE, and DRAIN pins.
  • The high current path is through the MOSFETs, therefore it is important to use thick and short traces for the source and drain of the MOSFET to minimize resistive losses.
  • The TGx and BGx pins of the LM74680 must be connected to the respective MOSFET gate with a short trace.
  • Place transient suppression components close to LM74680.
  • Obtaining acceptable performance with alternate layout schemes is possible, however the layout shown in Section 8.4.2 is intended as a guideline and to produce good results.