SNOSDD6 September   2021 LM74700-EP

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Input Voltage
      2. 8.3.2 Charge Pump
      3. 8.3.3 Gate Driver
      4. 8.3.4 Enable
    4. 8.4 Device Functional Modes
      1. 8.4.1 Shutdown Mode
      2. 8.4.2 Conduction Mode
        1. 8.4.2.1 Regulated Conduction Mode
        2. 8.4.2.2 Full Conduction Mode
        3. 8.4.2.3 Reverse Current Protection Mode
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Design Considerations
        2. 9.2.2.2 MOSFET Selection
        3. 9.2.2.3 Charge Pump VCAP, input and output capacitance
      3. 9.2.3 Selection of TVS Diodes for 12-V Battery Protection Applications
      4. 9.2.4 Selection of TVS Diodes and MOSFET for 24-V Battery Protection Applications
      5. 9.2.5 Application Curves
    3. 9.3 OR-ing Application Configuration
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Receiving Notification of Documentation Updates
    2. 12.2 Support Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Switching Characteristics

TJ = –55°C to +125°C; typical values at TJ = 25°C, V(ANODE) = 12 V, C(VCAP) = 0.1 µF, V(EN) = 3.3 V, over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
ENTDLY Enable (low to high) to Gate Turn On delay V(VCAP) > V(VCAP UVLOR) 75 110 µs
tReverse delay Reverse voltage detection to Gate Turn Off delay V(ANODE) – V(CATHODE) = 100 mV to –100 mV 0.45 0.75 µs
V(ANODE) = 28V, V(ANODE) – V(CATHODE) = 100 mV to –100 mV 0.45 0.75 µs
tForward recovery Forward voltage detection to Gate Turn On delay V(ANODE) – V(CATHODE) = –100 mV to 700 mV 1.4 3.1 µs
V(ANODE) = 28V, V(ANODE) – V(CATHODE) = –100 mV to 700 mV 1.4 2.6 µs